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BLCR5552
2020/08/19 16:59
Draft_R3-205475_SoD_CB3_R16Pos_F1AP_r0.doc
2020/08/17 13:43
86 KB
Draft_R3-205475_SoD_CB3_R16Pos_F1AP_r0_Nok.doc
2020/08/18 19:37
88,5 KB
Draft_R3-205475_SoD_CB3_R16Pos_F1AP_r0_Nok_Intel.doc
2020/08/19 6:25
90 KB
Draft_R3-205475_SoD_CB3_R16Pos_F1AP_r0_Nok_Intel_Eri.doc
2020/08/19 10:46
173,5 KB
Draft_R3-205475_SoD_CB3_R16Pos_F1AP_r0_Nok_Intel_Eri2.doc
2020/08/19 14:12
457,5 KB
Draft_R3-205475_SoD_CB3_R16Pos_F1AP_r0_Nok_Intel_Eri2_qc.doc
2020/08/19 18:02
464 KB
Draft_R3-205475_SoD_CB3_R16Pos_F1AP_r0_Nok_Intel_Eri2_qc_ZTE.doc
2020/08/20 7:04
434,9 KB
Draft_R3-205636_was_5475_SoD_CB3_R16Pos_F1AP_r0-Intel.doc
2020/08/24 6:57
450 KB
Draft_R3-205636_was_5475_SoD_CB3_R16Pos_F1AP_r0.doc
2020/08/21 7:54
447 KB
Draft_R3-205670 (TP to F1AP BLCR for TS38.473) F1 align on NRPPa r0.docx
2020/08/25 7:21
438,9 KB
draft_R3-205740_was4973 Introduction of POSITIONING INFO UPDATE on F1AP v1.DOCX
2020/08/26 7:26
65,9 KB
12 items.