/******************************************************************************/
// @copyright   Copyright Notification
//   No part may be reproduced except as authorized by written permission.
//   The copyright and the foregoing restriction extend to reproduction in all media.
//   Trademark 2010, 3GPP Organizational Partners (ARIB, ATIS, CCSA, ETSI, TTA, TTC).
//   All rights reserved.
// @version: IWD_10wk37
// $Date: 2010-09-17 09:01:56 +0200 (Fri, 17 Sep 2010) $
// $Rev: 3947 $
/******************************************************************************/
module MAC_713 {
//=========================================================================
// Import Part
//=========================================================================

  import from EUTRA_CellInfo all;
  import from EUTRA_ConfigurationSteps all;
  import from EUTRA_RRCSteps all;
  import from EUTRA_CommonProcedures all;
  import from EUTRA_LoopBack all;
  import from EPS_NAS_Templates all;
  import from EPS_NAS_Constants all;
  import from EUTRA_ASP_TypeDefs all;
  import from EUTRA_AspCommon_Templates all;
  import from EUTRA_CommonDefs all;
  import from EUTRA_CellCfg_Templates all;
  import from EUTRA_RRC_ASN1_Definitions language "ASN.1:1997" all;
  import from EUTRA_RRC_Templates all;
  import from EUTRA_ASP_DrbDefs all;
  import from EUTRA_ASP_SrbDefs all;
  import from EUTRA_SRB_Templates all;
  import from EUTRA_Component all;
  import from EUTRA_Paging all;
  import from MAC_Templates all;
  import from EUTRA_SecuritySteps  all;
  import from L2_CommonTemplates all;
  import from MAC_Functions all;
  import from L2_CommonFunctions all;
  import from EUTRA_Timing all;
  import from CommonDefs all;
  //import from EUTRA_CapabilityFunctions all;
  import from EPS_NAS_MsgContainers all;
  import from EUTRA_SecurityFunctions all;
  import from EUTRA_DRB_Templates all;
  
  //=========================================================================
  // Test case main functions
  //=========================================================================

  // Functions for Test cases
  //==========================================================
  // L2/MAC/7.2
  //==========================================================

  /*
   * @desc      REFERENCE TS 36.523-1 clause 7.1.3.1
   * @status    APPROVED
   */
  function f_TC_7_1_3_1_EUTRA ( ) runs on EUTRA_PTC
  { /* L2/MAC
       7.1.3.1 : Correct handling of DL assignment / dynamic case
    */
    var C_RNTI v_C_RNTI ;
    var MAC_SDU_Type v_EncodedRlcPdu1;

    timer t_Watchdog := 1.0;

    ///////////////////////////////////////////////////////////////////////////////////
    //      PREAMBLE
    //////////////////////////////////////////////////////////////////////////////////
    f_EUTRA_Init (c1);
    f_EUTRA_CellConfig_Def (eutra_Cell1);
    f_EUTRA_Preamble ( eutra_Cell1,STATE2A_TESTLOOP_ModeA );
    // creates cell and performs registration
    f_EUTRA_LoopBackActivation_State4_7131();
    // Go to state 4 to return no data in UL;
    f_Delay(0.660); // 600 ms previous time alignment timer
    //@sic R5s100068
    f_SS_Config1TM_DRB_NoMACHeader(eutra_Cell1, tsc_RbId_DRB1, cs_MAC_TestMode_NoHeaderManipulationDLOnly);
     // configure SS for default UL grant allocation at SR reception but no automatic PUCCH synch as time alignment timer is infinit;
    f_EUTRA_StartULGrantTransmissionOnSR_Reception_No_PUCCH_Sync(eutra_Cell1, cs_TimingInfo_Now, cs_DciInfo_CcchDcchDtchUL_Def);
    //@sic R5s100462 sic@
    // to configure SS to report reception of HARQ ACK or NACK
    f_SS_ConfigUL_HARQ_IndMode (eutra_Cell1, tsc_L1Mac_IndicationMode_Enable );
        f_EUTRA_SS_CommonL1MacIndCtrlConfig(eutra_Cell1, cas_HarqErrorIndication_REQ(eutra_Cell1,tsc_L1Mac_IndicationMode_Disable));//@sic R5s100520 sic@
    ///////////////////////////////////////////////////////////////////////////////////
    //      Test Body
    //////////////////////////////////////////////////////////////////////////////////
    f_EUTRA_TestBody_Set(true,layer2); // @sic R5-101050.

   
    //@siclog "Steps 1 - 2" siclog@
    // Note Step 1 automatically taken care by SS
    // 16B PDCP SDU + 2B PDCP H + 2B RLC Header +1 B MAC SH +1B Pad SH  = 22 B= 136 bits
    //MAC PDU wi hh gth no padding
    v_EncodedRlcPdu1 := f_RLC_PDU_Encvalue (cs_RLC_AMD_1PDU(tsc_NoPoll,
                                                            int2bit (0,10),
                                                            f_PDCP_PDU_Encvalue (cs_PDCP_PDU_LongSN(cs_PDCP_DataPdu_LongSN(tsc_B12_SQN0, crs_PDCP_SDU_16B)))));
    DRB.send (cas_DRB_COMMOM_REQ_MAC_PDU (eutra_Cell1,
                                          tsc_RbId_DRB1,
                                          cs_TimingInfo_Now,
                                          cs_MAC_PDUList_1 (cs_MAC_PDU_1SubHeader_1Padding(tsc_LchId_DRB1, v_EncodedRlcPdu1))));


    t_Watchdog.start;
    //@siclog "Step 3" siclog@
    SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1, ?, ack ));
    f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "Step 3");
    t_Watchdog.stop;

    // store cell info parameters for C-RNTI
    v_C_RNTI := f_EUTRA_CellInfo_GetC_RNTI(eutra_Cell1);
    // To configure SS to use a different C-RNTI that available at UE
    f_SS_ConfigActiveCellInfo(eutra_Cell1, cs_TimingInfo_Now, cs_NewC_RNTI_ConfigReq(tsc_C_RNTI_Def2));

    //@siclog "Steps 4 - 5" siclog@
    // Note Step 4 automatically taken care by SS
    v_EncodedRlcPdu1 := f_RLC_PDU_Encvalue (cs_RLC_AMD_1PDU(tsc_NoPoll,
                                                            int2bit (1, 10),
                                                            f_PDCP_PDU_Encvalue (cs_PDCP_PDU_LongSN(cs_PDCP_DataPdu_LongSN(tsc_B12_SQN1, crs_PDCP_SDU_16B)))));
    DRB.send (cas_DRB_COMMOM_REQ_MAC_PDU (eutra_Cell1,
                                          tsc_RbId_DRB1,
                                          cs_TimingInfo_Now,
                                          cs_MAC_PDUList_1 (cs_MAC_PDU_1SubHeader_1Padding(tsc_LchId_DRB1, v_EncodedRlcPdu1))));
    t_Watchdog.start(0.6); // 600 ms to avoid UE entering DRX
    //@siclog "Step 6" siclog@
    alt {
      []SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1, ?, ack ))
        {
          t_Watchdog.stop;
          f_EUTRA_SetVerdictFailOrInconc(__FILE__, __LINE__, "Step 6: UE is sending HARQ ACK when sent addressed to different CRNTI");
        }
      [] t_Watchdog.timeout
        {
          f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "Step 6");
        }
    };
    //test body ends
    f_EUTRA_TestBody_Set(false);
    ///////////////////////////////////////////////////////////////////////////////////
    //      Post Amble
    //////////////////////////////////////////////////////////////////////////////////
    // To configure SS to use same C-RNTI that available at UE
    f_SS_ConfigActiveCellInfo(eutra_Cell1, cs_TimingInfo_Now, cs_NewC_RNTI_ConfigReq(v_C_RNTI));
    // to configure SS to stop report reception of HARQ ACK or NACK
    f_SS_ConfigUL_HARQ_IndMode (eutra_Cell1, tsc_L1Mac_IndicationMode_Disable );
        f_SS_Config1TM_DRB_NoMACHeader(eutra_Cell1, tsc_RbId_DRB1,cs_MAC_TestMode_NormalMode); //@sic R5s100354

    // To deactivate test loop mode before RRC release
    //@sic R5-103847 Deactivate test loop and open test loop is removed sic@

    // Release RRC Connection and Switch off
    f_EUTRA_Postamble ( eutra_Cell1, E3_TESTMODE );//@sic R5-103875 sic@
  };


  /*
   * @desc      REFERENCE TS 36.523-1 clause 7.1.3.3
   * @status    APPROVED
   */
  function f_TC_7_1_3_3_EUTRA ( ) runs on EUTRA_PTC
  { /* 7.1.3.3 : MAC PDU header handling */
    var octetstring v_EncodedRlcPdu1;
    var octetstring v_EncodedRlcPdu2;
    var octetstring v_EncodedRlcPdu3;
    var octetstring v_EncodedRlcPdu4;
    var octetstring v_EncodedRlcPdu5;
    var octetstring v_EncodedRlcPdu6;

    ///////////////////////////////////////////////////////////////////////////////////
    //      PREAMBLE
    //////////////////////////////////////////////////////////////////////////////////
    f_EUTRA_Init (c1);
    f_EUTRA_CellConfig_Def (eutra_Cell1);
    f_EUTRA_Preamble ( eutra_Cell1,STATE2A_TESTLOOP_ModeA );
    f_EUTRA_AS_CipheringAlgorithm_Set(eea0); // set null AS ciphering algorithm
    // creates cell and performs registration

    //@sic R5s090337 sic@
    f_EUTRA_LoopBackActivation_State4_Def_DisableBSR_PHR(eutra_Cell1, cs_UE_TestLoopModeA_LB_Setup_1DRB(0,tsc_DRB1) );
     // step to configure SS RLC/PDCP and MAC in No header manipulation mode on SS Side for DRB
    f_SS_Config1TM_DRB_NoMACHeader(eutra_Cell1, tsc_RbId_DRB1,cs_MAC_TestMode_NoHeaderManipulationDL_UL);

    ///////////////////////////////////////////////////////////////////////////////////
    //      Test Body
    //////////////////////////////////////////////////////////////////////////////////
    f_EUTRA_TestBody_Set(true,layer2); // @sic R5-101050.
    // preconfig SS for UL Grant of 24 bits
    f_EUTRA_StartExplicitULGrantTransmissionOnSR_Reception( eutra_Cell1,
                                    cs_TimingInfo_Now,
                                    1, 1); /* Nprb = 1, Itbs = 1          Table 7.1.7.2.1-1 of 36.213
                                              Imcs = 1 -> Itbs = 1   MCS index of table 8.6.1-1 of 36.213 */


    //@siclog "Step 1" siclog@
    // 128B PDCP SDU + 2B PDCP H + 2B RLC Header +3B MAC SH+ 1B Pad SH + 5B Pad = 141 B= 1128 bits
    v_EncodedRlcPdu1 := f_RLC_PDU_Encvalue (cs_RLC_AMD_1PDU(tsc_Poll,
                                                            int2bit (0,10),
                                                            f_PDCP_PDU_Encvalue (cs_PDCP_PDU_LongSN(cs_PDCP_DataPdu_LongSN(tsc_B12_SQN0, crs_PDCP_SDU_L128)))));
    DRB.send (cas_DRB_COMMOM_REQ_MAC_PDU (eutra_Cell1,
                                          tsc_RbId_DRB1,
                                          cs_TimingInfo_Now,
                                          cs_MAC_PDUList_1 (cs_MAC_PDU_1SubHeader_Padding_Large(tsc_LchId_DRB1,
                                                                                                 crs_Padding_5Bytes,
                                                                                                 v_EncodedRlcPdu1))));

    //@siclog "Step 2" siclog@
    //Local function f_RLC_Status_PDU_Rx (SN) to retrieve de RLC Status PDU with a given SN
    f_RLC_Status_PDU_Rx (tsc_LchId_DRB1,1);

    //@siclog "Step 3" siclog@
    // 38B PDCP SDU + 2B PDCP H + 2B RLC Header +2B MAC SH+ 1B Pad SH + 4B Pad = 49 B= 392 bits
    //Same as step1 but with short subheaders length (F=1)
    v_EncodedRlcPdu1 := f_RLC_PDU_Encvalue (cs_RLC_AMD_1PDU(tsc_Poll,
                                                            int2bit (1,10),
                                                            f_PDCP_PDU_Encvalue (cs_PDCP_PDU_LongSN(cs_PDCP_DataPdu_LongSN(tsc_B12_SQN1, crs_PDCP_SDU_L38)))));
    DRB.send (cas_DRB_COMMOM_REQ_MAC_PDU (eutra_Cell1,
                                          tsc_RbId_DRB1,
                                          cs_TimingInfo_Now,
                                          cs_MAC_PDUList_1 (cs_MAC_PDU_1SubHeader_Padding_RLCPDU_Short(crs_Padding_4Bytes,
                                                                                                        tsc_LchId_DRB1, v_EncodedRlcPdu1))));

    //@siclog "Step 4" siclog@
    f_RLC_Status_PDU_Rx (tsc_LchId_DRB1,2);

    //@siclog "Step 5" siclog@
    // 128B PDCP SDU + 2B PDCP H + 2B RLC Header +1 B MAC SH  = 133 B= 1064 bits
    // MAC PDU with no padding
    v_EncodedRlcPdu1 := f_RLC_PDU_Encvalue (cs_RLC_AMD_1PDU(tsc_Poll,
                                                            int2bit (2,10),
                                                            f_PDCP_PDU_Encvalue (cs_PDCP_PDU_LongSN(cs_PDCP_DataPdu_LongSN(tsc_B12_SQN2, crs_PDCP_SDU_L128)))));
    DRB.send (cas_DRB_COMMOM_REQ_MAC_PDU (eutra_Cell1,
                                          tsc_RbId_DRB1,
                                          cs_TimingInfo_Now,
                                          cs_MAC_PDUList_1 (cs_MAC_PDU_NoPadding_RLCPDU_LCID(tsc_LchId_DRB1, v_EncodedRlcPdu1))));

    //@siclog "Step 6" siclog@
    f_RLC_Status_PDU_Rx (tsc_LchId_DRB1,3);

    //@siclog "Step 7" siclog@
    // 1 MAC PDU = 5 RLC PDU; 1RLC PDU =1 PDCP PDU
    // MAC Header = 3 + 4*2 + 1=12 bytes.
    // MAC SDU's =130 => RLC SDU=128, PDCP SDU= 126
    // 5 MAC SDU's of 43 => RLC SDU= 41, PDCP SDU =39.
    // Total MAC PDU = 12 + 130+ 5*43 = 357 B = 2856.
    //@sic R5s-090171 sic@
    v_EncodedRlcPdu1 := f_RLC_PDU_Encvalue (cs_RLC_AMD_1PDU(tsc_NoPoll,
                                                            int2bit (3,10),
                                                            f_PDCP_PDU_Encvalue (cs_PDCP_PDU_LongSN(cs_PDCP_DataPdu_LongSN(tsc_B12_SQN3, crs_PDCP_SDU_L126)))));
    v_EncodedRlcPdu2 := f_RLC_PDU_Encvalue (cs_RLC_AMD_1PDU(tsc_NoPoll,
                                                            int2bit (4,10),
                                                            f_PDCP_PDU_Encvalue (cs_PDCP_PDU_LongSN(cs_PDCP_DataPdu_LongSN(tsc_B12_SQN4, crs_PDCP_SDU_L39)))));
    v_EncodedRlcPdu3 := f_RLC_PDU_Encvalue (cs_RLC_AMD_1PDU(tsc_NoPoll,
                                                            int2bit (5,10),
                                                            f_PDCP_PDU_Encvalue (cs_PDCP_PDU_LongSN(cs_PDCP_DataPdu_LongSN(tsc_B12_SQN5, crs_PDCP_SDU_L39)))));
    v_EncodedRlcPdu4 := f_RLC_PDU_Encvalue (cs_RLC_AMD_1PDU(tsc_NoPoll,
                                                            int2bit (6,10),
                                                            f_PDCP_PDU_Encvalue (cs_PDCP_PDU_LongSN(cs_PDCP_DataPdu_LongSN(tsc_B12_SQN6, crs_PDCP_SDU_L39)))));
    v_EncodedRlcPdu5 := f_RLC_PDU_Encvalue (cs_RLC_AMD_1PDU(tsc_NoPoll,
                                                            int2bit (7,10),
                                                            f_PDCP_PDU_Encvalue (cs_PDCP_PDU_LongSN(cs_PDCP_DataPdu_LongSN(tsc_B12_SQN7, crs_PDCP_SDU_L39)))));
    v_EncodedRlcPdu6 := f_RLC_PDU_Encvalue (cs_RLC_AMD_1PDU(tsc_Poll,
                                                            int2bit (8,10),
                                                            f_PDCP_PDU_Encvalue (cs_PDCP_PDU_LongSN(cs_PDCP_DataPdu_LongSN(tsc_B12_SQN8, crs_PDCP_SDU_L39)))));


    DRB.send (cas_DRB_COMMOM_REQ_MAC_PDU (eutra_Cell1,
                                          tsc_RbId_DRB1,
                                          cs_TimingInfo_Now,
                                          cs_MAC_PDUList_1 (cs_MAC_PDU_NoPadding_RLCPDU_Step7(tsc_LchId_DRB1,
                                                                                             v_EncodedRlcPdu1,
                                                                                             v_EncodedRlcPdu2,
                                                                                             v_EncodedRlcPdu3,
                                                                                             v_EncodedRlcPdu4,
                                                                                             v_EncodedRlcPdu5,
                                                                                             v_EncodedRlcPdu6))));
    //@siclog "Step 8" siclog@
    f_RLC_Status_PDU_Rx (tsc_LchId_DRB1, 9);

    f_EUTRA_TestBody_Set(false);
    //test body ends

    ///////////////////////////////////////////////////////////////////////////////////
    //      Post Amble
    //////////////////////////////////////////////////////////////////////////////////
     // step to configure SS RLC/PDCP and MAC in No header manipulation mode on SS Side for DRB
    f_SS_Config1TM_DRB_NoMACHeader(eutra_Cell1, tsc_RbId_DRB1,cs_MAC_TestMode_NormalMode); //@sic R5s100272

    // configure SS in normal grant transmission
    f_EUTRA_StartDefULGrantTransmission(eutra_Cell1,cs_TimingInfo_Now);

    // To deactivate test loop mode before RRC release
    //@sic R5-103847 Deactivate test loop and open test loop is removed sic@

    // Release RRC Connection and Switch off
    f_EUTRA_Postamble ( eutra_Cell1, E3_TESTMODE );//@sic R5-103875 sic@
  };


  /*
   * @desc      REFERENCE TS 36.523-1 clause 7.1.3.4
   * @status    APPROVED
   */
  function f_TC_7_1_3_4_EUTRA ( ) runs on EUTRA_PTC
  { /* L2/MAC
     * 7.1.3.4 : Correct HARQ process handling[DCCH /DTCH]
     */
     //@sic R5-104710 sic@
    var integer j :=0, k :=0, v_Nack_Count := 0;
    var EUTRA_FDD_TDD_Mode_Type v_EUTRA_FDD_TDD_Mode;
    var Dl_Bandwidth_Type v_Dl_Bandwidth ;
    var Combination_Type  v_Combination  ;
    // var template (value) DciDlInfoCommon_Type v_DciDlInfoCommon ;

    timer t_Watchdog := 5.0;

    ///////////////////////////////////////////////////////////////////////////////////
    //      PREAMBLE
    //////////////////////////////////////////////////////////////////////////////////
    f_EUTRA_Init (c1);
    f_EUTRA_CellConfig_Def (eutra_Cell1);
    f_EUTRA_Preamble (eutra_Cell1, STATE2A_TESTLOOP_ModeA);
    // creates cell and performs registration
    //@sic R5s100049
    f_EUTRA_LoopBackActivation_State4_TA_Infinity_LB_NoScaling();
    //@sic R5-101183
    f_Delay(0.660); // 600 ms previous time alignment timer
    // Go to state 4
    f_EUTRA_StartULGrantTransmissionOnSR_Reception_No_PUCCH_Sync(eutra_Cell1, cs_TimingInfo_Now, cs_DciInfo_CcchDcchDtchUL_Def);
    //@sic R5s100068 R5s100463 sic@
    // to configure SS to report reception of HARQ ACK or NACK
    f_SS_ConfigUL_HARQ_IndMode (eutra_Cell1, tsc_L1Mac_IndicationMode_Enable);
    f_EUTRA_SS_CommonL1MacIndCtrlConfig(eutra_Cell1, cas_HarqErrorIndication_REQ(eutra_Cell1,tsc_L1Mac_IndicationMode_Disable));//@sic R5s100520 sic@
    // to configure SS to report reception of SR
    //@sic R5s100021
    //f_SS_ConfigSchedulingRequestIndMode(eutra_Cell1, tsc_L1Mac_IndicationMode_Enable);
    ///////////////////////////////////////////////////////////////////////////////////
    //      Test Body
    //////////////////////////////////////////////////////////////////////////////////
    f_EUTRA_TestBody_Set(true,layer2); // @sic R5-101050.
        f_SS_ConfigUL_HARQ_IndMode (eutra_Cell1, tsc_L1Mac_IndicationMode_Disable );
     v_Dl_Bandwidth := f_EUTRA_CellInfo_GetDL_ChBandwidth(eutra_Cell1);
    v_Combination  := f_EUTRA_CellInfo_GetCombination(eutra_Cell1);
    
    v_EUTRA_FDD_TDD_Mode :=f_EUTRA_CellInfo_GetFDD_TDD (eutra_Cell1);
    if (v_EUTRA_FDD_TDD_Mode == FDD)
      {
        k:= 7; // HARQ process 0..7
      }
    else if (v_EUTRA_FDD_TDD_Mode == TDD)
      {
        k:= 6; // HARQ process 0..6
      }

    for (j :=0; j <= k; j:= j+1)
      {
        
        //@siclog "Step 1" siclog@
        f_EUTRA_SS_CommonCellConfig(eutra_Cell1, cas_DL_DCI_ExplicitConfig_REQ(eutra_Cell1,
                                                                      cs_TimingInfo_Now,
                                                                      6,
                                                                      dci_1A,
                                                                      ra_2_Localised,
                                                                      1));
        // Tb size =328b; 2B PDCP H + 2B RLC H + 1 B MAC Header =40 bits
        // PDCP SDU = 328 -40 = 288 b =36B
        DRB.send (cas_DRB_COMMON_REQ_PDCP_SDU (eutra_Cell1,
                                               tsc_RbId_DRB1,
                                               cs_TimingInfo_Now,
                                               cs_PDCP_SDUList_1 (crs_PDCP_SDU_36B),
                                               cs_HarqProcessAssignment_Specific(j)));

        t_Watchdog.start;
        //@siclog "Step 2" siclog@
        SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1, ?, nack ));
        f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "Step 2");
        

        //@siclog "Step 3" siclog@
        // MAC PDU retransmision automatically performed by SS
        //@siclog "Step 4" siclog@
        alt {
          []SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1, ?, ack ))
            {
              f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "Step 4");
              t_Watchdog.stop;
            };
          [v_Nack_Count<3]SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1, ?, nack ))
          {
            v_Nack_Count := v_Nack_Count +1;
             repeat;
          }
          [] t_Watchdog.timeout
            {
              f_EUTRA_SetVerdictFailOrInconc(__FILE__, __LINE__, "Step 4: UE did not send HARQ ACK");
            }
        };


        //@siclog "Step5" siclog@
        //Taken care by SS
        //@sic R5s100021
        //t_Watchdog.start;
        //SYSIND.receive ( car_SchedulingReq_IND (eutra_Cell1, ?));
        //f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "");
        //t_Watchdog.stop;

        //@siclog "Step 6" siclog@
        // Send UL Grant automatically taken care of
        //@siclog "Step 7" siclog@
        t_Watchdog.start;
        DRB.receive (car_DRB_COMMON_IND_PDCP_SDUList (eutra_Cell1, tsc_RbId_DRB1, ?, cr_PDCP_SDUList_1(crs_PDCP_SDU_36B)));
        f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "Step 7");
        t_Watchdog.stop;
        //@sic R5s100021
        // allow for possible 1 HARQ ACK for RLC Status PDU transmitted in DL
        t_Watchdog.start(1.0);
        alt {
          [] SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1, ?, ack ))
            {
              t_Watchdog.timeout;
            }
          [] SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1, ?, nack ))
            {
              repeat;
            }
          [] t_Watchdog.timeout
            {
              // do nothing
            }
        };
      };// end of for loop

    f_EUTRA_TestBody_Set(false);
    //test body ends

    ///////////////////////////////////////////////////////////////////////////////////
    //      Post Amble
    //////////////////////////////////////////////////////////////////////////////////
    // to configure SS to stop report reception of HARQ ACK or NACK
     f_SS_ConfigUL_HARQ_IndMode (eutra_Cell1, tsc_L1Mac_IndicationMode_Disable);


    f_EUTRA_SS_CommonCellConfig(eutra_Cell1, cas_DciDlInfoCommon_Config(eutra_Cell1, cs_TimingInfo_Now, cs_DciInfo_CcchDcchDtchDL(v_Dl_Bandwidth, v_Combination)));
    // to configure SS to stop report reception of SR
    //@sic R5s100021
    //f_SS_ConfigSchedulingRequestIndMode(eutra_Cell1,tsc_L1Mac_IndicationMode_Disable );

    // To deactivate test loop mode before RRC release
    //@sic R5-103847 Deactivate test loop and open test loop is removed sic@

    // Release RRC Connection and Switch off
    f_EUTRA_Postamble ( eutra_Cell1, E3_TESTMODE );//@sic R5-103875 sic@;
  };

  /*
   * @desc      REFERENCE TS 36.523-1 clause 7.1.3.5
   * @status    APPROVED
   */
  function f_TC_7_1_3_5_EUTRA ( ) runs on EUTRA_PTC
  { /* L2/MAC/7.1
       7.1.3.5 : Correct HARQ process handling [CCCH]
    */
    var template (value) EUTRA_FDD_TDD_CellInfo_Type  v_EUTRA_FDD_TDD_Info;
    
    var octetstring v_EncodedRRCConnectionSetup;
    var template (value) RachProcedureConfig_Type v_RachProcedureConfig;
    // variables for handling racing problem @sic R5s090132 sic@
    var template (omit) SRB_COMMON_IND v_SrbIndByRef:=omit;    // not used (needed when other information of the RRC message needs to be access)
    var template (omit) SYSTEM_IND v_SysIndByRef:=omit;        // to store SYSTEM_IND if it takes over the RRC message
    var SR_PUCCH_ResourceIndex_Type v_Sr_PUCCH_ResourceIndex;
    var boolean v_RRCConReq := false, v_HARQ_Ind := false, v_HARQ_Ind2 := false, v_RRCConSetupCmpl := false;
    var SRB_COMMON_IND v_SRB_COMMON_IND;
    var SYSTEM_IND v_SYSTEM_IND;
    var SubFrameTiming_Type v_Timing_SysInd,v_Timing_SysInd2, v_Timing_SrbIndReq, v_Timing_SrbIndCmpl;
    var EUTRA_FDD_TDD_Mode_Type  v_EUTRA_FDD_TDD_Mode ;
    var template (value) PhysicalConfigDedicated_AntennaInfo_Type v_AntennaInfo;
    var SR_ConfigIndex_Type v_SR_ConfigIndex ; //@sic R5-102177 sic@
    var NAS_MSG_Indication_Type v_NAS_Ind; //@sic R5-102180
    var EUTRA_SecurityParams_Type v_Auth_Params ;

    timer t_Watchdog:=2.0; // General purpose wait timer set as T300 value
    

    ///////////////////////////////////////////////////////////////////////////////////
    //      PREAMBLE
    //////////////////////////////////////////////////////////////////////////////////
    f_EUTRA_Init (c1);
    v_EUTRA_FDD_TDD_Info:=f_EUTRA_CellInfo_GetFDD_TDD_Info (eutra_Cell1);
    v_EUTRA_FDD_TDD_Mode := f_EUTRA_CellInfo_GetFDD_TDD (eutra_Cell1); //@sic R5s100189 sic@
    v_Sr_PUCCH_ResourceIndex := f_EUTRA_CellInfo_GetSR_PUCCH_ResourceIndex ( eutra_Cell1 );
    v_AntennaInfo := f_EUTRA_CellInfo_GetAntennaInfoDedicated (eutra_Cell1);
    v_SR_ConfigIndex := f_EUTRA_CellInfo_GetSR_ConfigIndex (eutra_Cell1 ); //@sic R5-102177 sic@
    // Modify SIB's for test case Specific values.
    f_EUTRA_CellInfo_SetPreambleTransMax(eutra_Cell1,n8 );
    f_EUTRA_CellInfo_SetSysInfo_T300 (eutra_Cell1, ms2000);
    f_EUTRA_CellInfo_SetMAC_ContResTimer (eutra_Cell1, sf64);
    //@sic R5s100116
    if (v_EUTRA_FDD_TDD_Mode == FDD)
    {
        f_EUTRA_CellInfo_SetPRACH_ConfigurationIndex(eutra_Cell1, 1);
    }
    else if (v_EUTRA_FDD_TDD_Mode == TDD)
    {
        f_EUTRA_CellInfo_SetPRACH_ConfigurationIndex(eutra_Cell1, 0);
    }

    f_EUTRA_CellConfig_Def (eutra_Cell1);
    f_EUTRA_Preamble ( eutra_Cell1 , STATE2_IDLEUPDATE);

    // creates cell and performs registration

    v_EncodedRRCConnectionSetup := f_RRC_DL_CCCH_Encvalue (cs_508_RRCConnectionSetup(tsc_RRC_TI_Def,
                                                                                     v_EUTRA_FDD_TDD_Info.pucch_Config,v_Sr_PUCCH_ResourceIndex, v_AntennaInfo,v_SR_ConfigIndex));
    
    
    v_RachProcedureConfig := cs_RachProcedureConfig_7135 ( v_EncodedRRCConnectionSetup,
                                                           f_EUTRA_CellInfo_GetRAR_TA(eutra_Cell1),
                                                           f_EUTRA_CellInfo_GetDL_ChBandwidth(eutra_Cell1) );// @sic R5-103846 sic@
                                                                                      /*
                                                                                      cs_RachProcedureConfig_7135 has four entries
                                                                                         step 3 CRC error
                                                                                         Step 9 not matching ContResolution ID
                                                                                         Step 19 CRC error
                                                                                         Step 19 success
                                                                                      */
    f_EUTRA_SS_ConfigRachProcedure(eutra_Cell1, omit, v_RachProcedureConfig );
    // Preconfigures SS for RACH response for RAR and contention resolution

    // Configure SS to enable report of PRACH preamble reception
    f_EUTRA_SS_ConfigRachPreambleIndMode (eutra_Cell1, tsc_L1Mac_IndicationMode_Enable);

    // to configure SS to start report reception of HARQ ACK or NACK
    f_SS_ConfigUL_HARQ_IndMode (eutra_Cell1, tsc_L1Mac_IndicationMode_Enable);
    // Preconfig SS for default UL grant allocation on SR reception.
    f_EUTRA_StartULGrantTransmissionOnSR_Reception_No_PUCCH_Sync(eutra_Cell1,cs_TimingInfo_Now, cs_DciInfo_CcchDcchDtchUL_Def);
    ///////////////////////////////////////////////////////////////////////////////////
    //      Test Body
    //////////////////////////////////////////////////////////////////////////////////
    f_EUTRA_TestBody_Set(true);
        v_Auth_Params := f_EUTRA_Security_Get();//@sic R5-102180
    // Test body starts

    //@siclog "Step 1" siclog@
    f_EUTRA_UE_Page_Def ( eutra_Cell1 );

    //@siclog "Step 2" siclog@
    t_Watchdog.start;
    SYSIND.receive ( car_PRACH_Preamble_IND_Any (eutra_Cell1, ?));
    f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "Step 2");
    t_Watchdog.stop;

    //@siclog "Step 3" siclog@
    // Automatically taken care of
    //@siclog "Steps 4 - 5" siclog@
    t_Watchdog.start;
    alt {
      []SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1, ?, ? ))
        {
          t_Watchdog.stop;
          f_EUTRA_SetVerdictFailOrInconc(__FILE__, __LINE__, "Step 4: UE sending a ACK/NACK");
        }
      []SYSIND.receive ( car_PRACH_Preamble_IND_Any (eutra_Cell1,?))
        {
          t_Watchdog.stop;
          f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "Step 5");
        }
    };

    //@siclog "Step 6" siclog@
    // Automatically taken care of
    /*
    //@siclog "Steps 7 - 8" siclog@
    t_Watchdog.start;
    alt {
      []SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1, ?, ack )) // step 7
        {
          t_Watchdog.stop;
          f_EUTRA_SetVerdictFailOrInconc(__FILE__, __LINE__, "UE sending a ACK");
        }
      [] SRB.receive ( car_SRB0_RrcPdu_IND ( eutra_Cell1, cr_RRCConnectionRequest ( ? ) ) ) // step 8
        {
          f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "");
          t_Watchdog.stop;
        }
    };

    //@siclog "Step 9" siclog@
    // Automatically taken care of
    //@siclog "Steps 10 - 11" siclog@
    t_Watchdog.start;
    alt {
      []SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1, ?, nack )) // step 10
        {
          t_Watchdog.stop;
          f_EUTRA_SetVerdictFailOrInconc(__FILE__, __LINE__, "UE sending a NACK");
        }
      []SYSIND.receive ( car_PRACH_Preamble_IND_Any (eutra_Cell1,?)) // step 11
        {
          f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "");
          t_Watchdog.stop;
        }
    };
    */
    //@siclog "Step 8" siclog@
    // And possibly step 11.
    //@siclog "Steps 7 - 10" siclog@
    // step 7 and step 10 to match in default handler.
    //@siclog "Step 9" siclog@
    // Automatically taken care off
    f_EUTRA_RacingCond_AwaitRrcMessageBeforeSysInd(car_SRB0_RrcPdu_IND ( eutra_Cell1, cr_RRCConnectionRequest ( ? ) ),
                                                   v_SrbIndByRef, v_SysIndByRef );  /* @sic R5s100138 Change 1 Note 5 sic@ */
    f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "Step 8");
    // If step 11 not received then receive else to match
    f_EUTRA_RacingCond_MatchSysInd(v_SysIndByRef,
                                   car_PRACH_Preamble_IND_Any (eutra_Cell1, ?)); /* @sic R5s100138 Change 1 Note 5 sic@ */

    //@siclog "Step 12" siclog@
    // Automatically taken care of
    // Note Racing should not be between steps 13 and 16 as UE has to wait for mac-ContentionResolutionTimer  which is 48 ms
    // before initiating the next PRACH procedure.
    //@siclog "Step 13" siclog@
    t_Watchdog.start;
    SRB.receive ( car_SRB0_RrcPdu_IND ( eutra_Cell1, cr_RRCConnectionRequest ( ? ) ) ); // step 13
    f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "Step 13");
    t_Watchdog.stop;
    
    //@siclog "Step 14" siclog@
    // Automatically taken care of
    //@siclog "Steps 15 - 16" siclog@
    t_Watchdog.start;
    alt {
      []SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1, ?, nack ))
        {
          t_Watchdog.stop;
          f_EUTRA_SetVerdictFailOrInconc(__FILE__, __LINE__, "Step 15: UE sending a NACK");
        }
      []SYSIND.receive ( car_PRACH_Preamble_IND_Any (eutra_Cell1,?))
        {
          t_Watchdog.stop;
          f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "Step 16");
        }
    };

    //@siclog "Step 17" siclog@
    // Automatically taken care of
    
    t_Watchdog.start;
    alt {
      //@siclog "Step 18" siclog@
      //@siclog "Step 19" siclog@
      // Automatically taken care of
      [not v_RRCConReq] SRB.receive ( car_SRB0_RrcPdu_IND ( eutra_Cell1, cr_RRCConnectionRequest ( ? ) ) ) -> value v_SRB_COMMON_IND
        {
          v_Timing_SrbIndReq := v_SRB_COMMON_IND.Common.TimingInfo.SubFrame; // timestamp when RRCConnectReq has been received
          v_RRCConReq := true;
          if (not (v_HARQ_Ind and v_RRCConSetupCmpl and v_HARQ_Ind2)) {repeat}
         
        }
      //@siclog "Step 20" siclog@
      [not v_HARQ_Ind] SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1, ?, ack )) -> value v_SYSTEM_IND
        {
          f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "Step 20");
          v_HARQ_Ind := true;
          v_Timing_SysInd := v_SYSTEM_IND.Common.TimingInfo.SubFrame;     // timestamp when SYSTEM_IND has been received
          
          if (not (v_RRCConReq and v_RRCConSetupCmpl and v_HARQ_Ind2)) {repeat}
          
        }
      //@siclog "Step 21" siclog@
      [not v_RRCConSetupCmpl] SRB.receive ( car_SRB1_RrcNasPdu_IND ( eutra_Cell1, cr_508_RRCConnectionSetupComplete ( tsc_RRC_TI_Def, ? ),
                                                cr_NAS_Indication ( tsc_SHT_IntegrityProtected,
                                                                    cr_508_SERVICE_REQUEST ( v_Auth_Params.KSIasme ) ) ) )-> value v_SRB_COMMON_IND
        {
          v_Timing_SrbIndCmpl := v_SRB_COMMON_IND.Common.TimingInfo.SubFrame; // timestamp when RRCConnectSetup complete has been received
          v_RRCConSetupCmpl := true;
           v_NAS_Ind := v_SRB_COMMON_IND.Signalling.Nas[0];
          if (not ( v_RRCConReq and v_HARQ_Ind and v_HARQ_Ind2)) {repeat}// RRC connection shall be received before RRC connection setup complet;
                                                                         // checked to guarantee run time errors if any un initialised timing info check in if statement below;

         
        }
      [not v_HARQ_Ind2] SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1, ?, ack )) -> value v_SYSTEM_IND
        // HARQ for RLC Status PDU for RRC Connection Setup Complete
        {
          v_HARQ_Ind2 := true;
          v_Timing_SysInd2 := v_SYSTEM_IND.Common.TimingInfo.SubFrame;     // timestamp when SYSTEM_IND has been received
          
          if (not ( v_RRCConReq and v_HARQ_Ind and v_RRCConSetupCmpl )) {repeat} // note HARQ for Setup shall come before HARQ for HARQ for Status PDU
         
        }
    }
    t_Watchdog.stop;
    if (not f_EUTRA_RacingCond_CheckSequence({v_Timing_SrbIndReq, v_Timing_SysInd, v_Timing_SrbIndCmpl, v_Timing_SysInd2})) {
      f_EUTRA_SetVerdictInconc(__FILE__, __LINE__, "Step 18 - 20 - 21: got unexpected message order");
    }

    // to configure SS to stop report reception of HARQ ACK or NACK
    f_SS_ConfigUL_HARQ_IndMode (eutra_Cell1,tsc_L1Mac_IndicationMode_Disable );
    //@siclog "Steps 22 - 23 - 24 - 25" siclog@
    // @sic R5-102180 sic@
    // Steps 6 to 9 of the generic radio bearer establishment procedure (TS 36.508 5.4.3.3-1) are executed
    // to successfully complete the service request procedure
    f_EUTRA_StartDefULGrantTransmission ( eutra_Cell1, cs_TimingInfo_Now );//@sic R5s100189 sic@
    f_EUTRA_ServiceReqPostamble_508Steps6_9 (eutra_Cell1, v_NAS_Ind);

    f_EUTRA_TestBody_Set(false);
    //test body ends
    ///////////////////////////////////////////////////////////////////////////////////
    //      Post Amble
    //////////////////////////////////////////////////////////////////////////////////
    
    // Configure SS to disable report of  PRACH preamble reception
    f_EUTRA_SS_ConfigRachPreambleIndMode (eutra_Cell1 ,tsc_L1Mac_IndicationMode_Disable);
    // Preconfigures SS for RACH response for default RAR and contention resolution
    f_EUTRA_SS_ConfigRachProcedure (eutra_Cell1, omit, cs_RachProcedureConfig_Def(omit,
                                                              f_EUTRA_CellInfo_GetRAR_TA(eutra_Cell1),
                                                              f_EUTRA_CellInfo_GetDL_ChBandwidth(eutra_Cell1)));// @sic R5-103846 sic@

    //Switch off UE and expect a DETACH REQUEST message
    f_EUTRA_Postamble ( eutra_Cell1, E2_CONNECTED );//@sic R5-103875 sic@
  };

  function f_EUTRA_ModifySysinfo_ValueTag_7136 ( CellId_Type p_CellId,
                                            boolean p_PagingFlag := true ) runs on EUTRA_PTC
  {
    var template (value) AllSiSchedul_Type v_SiSchedul;
    var SubFrameTiming_Type     v_Timing;
    var integer                 v_TimeToPaging; //@sic R5s100475 cl. 4.3 Additional changes sic@
    var SystemFrameNumber_Type  v_StartNextModPeriod, v_Timing_SFN, v_TimeOfPaging; //@sic R5s100475 cl. 4.3 Additional changes sic@
    var EUTRA_CellSysInfo_Type  v_Sysinfo:= f_EUTRA_CellInfo_GetSYSINFO (p_CellId);  // Get SYSINFO to be sent
    var integer v_ModificationPeriodFrames := f_CalculateModificationPeriod (p_CellId);
    var EUTRA_FDD_TDD_Mode_Type  v_EUTRA_FDD_TDD_Mode := f_EUTRA_CellInfo_GetFDD_TDD ( p_CellId );
    var PCCH_Config v_PcchConfig := f_EUTRA_CellInfo_GetPCCH_ConfigInSYSINFO(p_CellId); //@sic R5s100475 cl. 4.3 Additional changes sic@
    var integer v_PagingCycle := f_EUTRA_GetPagingCycleValue (v_PcchConfig.defaultPagingCycle); //@sic R5s100475 cl. 4.3 Additional changes sic@

    // Increment the VALUE TAG if neeeded
    if (v_Sysinfo.SB1_ValueTagChanged == true ) {
      v_Sysinfo.BCCH_Info.SIB1.message_.c1.systemInformationBlockType1.systemInfoValueTag :=
        (v_Sysinfo.BCCH_Info.SIB1.message_.c1.systemInformationBlockType1.systemInfoValueTag + 1) mod 32;
      f_EUTRA_SetSysinfo (p_CellId,v_Sysinfo);     // Save SYSINFO with the new valueTag in the record
      f_EUTRA_SetSB1_ValueTag (p_CellId, false);  // Set the flag to FALSE
    };

    //Get the current SFN and subframe
    v_Timing := f_EUTRA_GetCurrentTiming ( p_CellId );
    //Add processing delay to current SFN
    v_Timing_SFN := (v_Timing.SFN.Number + tsc_SfnDelay) mod 1024; //@sic R5s100475 cl. 4.3 Additional changes sic@

    //Calculate the next Modification Period
    //@sic R5s100475 cl. 4.3 Additional changes sic@
    v_StartNextModPeriod := (v_Timing_SFN + (v_ModificationPeriodFrames -(v_Timing_SFN mod v_ModificationPeriodFrames)))mod 1024;
    
    //@sic R5s100475 cl. 4.3 Additional changes sic@
    //Calculate time to paging in SFNs
    v_TimeToPaging := (1024 - v_Timing_SFN + v_StartNextModPeriod) mod 1024;
    
    //@sic R5s100475 cl. 4.3 Additional changes sic@
    if (p_PagingFlag) {
      //Check if there is time to page within this modification period
      if (v_TimeToPaging > 2*v_PagingCycle) {//At least two paging frames are available within this modification period
        //Page UE within this modification period
        v_TimeOfPaging := v_Timing_SFN;
      }
      else {//if two paging frames are not available within this modification period
        //Page UE from the start of the next modification period
        v_TimeOfPaging := v_StartNextModPeriod;

        //And send Sys info at the second next modification period
        v_StartNextModPeriod := (v_StartNextModPeriod + v_ModificationPeriodFrames) mod 1024;
      }

      //Page UE within this modification period or from the start of the next modification period
      //based oon above calculation
      f_EUTRA_UE_PageSysinfoMod ( p_CellId, v_TimeOfPaging );
    }
    // Extract the SI scheduling from BCCH info
    v_SiSchedul := f_EUTRA_SS_SetupSchedulingInfo(v_Sysinfo.BCCH_Info.SIB1.message_.c1.systemInformationBlockType1, v_EUTRA_FDD_TDD_Mode);      /* derive SS's scheduling information from SIB1 */
    f_SS_ConfigCRC_ErrorMode (eutra_Cell1,cs_DL_SCH_CRC_SI_RNTI_Error(Erroneous),cs_TimingInfo_SFN(v_StartNextModPeriod));
    // Send sysinfo at the start of the next appropriate modification period
    SYS.send (cas_ModifySysinfo_Def_REQ( p_CellId,
                                         cs_TimingInfo_SFN(v_StartNextModPeriod),
                                         v_SiSchedul,              /* scheduling of SIs */
                                         v_Sysinfo.BCCH_Info,       /* system information to be scheduled */
                                         f_EUTRA_CellInfo_GetDL_ChBandwidth (p_CellId)));
   v_Timing.SFN.Number := v_StartNextModPeriod;
   v_Timing := f_EUTRA_TimingInfoAdd(v_Timing, 100);
   f_SS_ConfigCRC_ErrorMode (eutra_Cell1,cs_DL_SCH_CRC_SI_RNTI_Error(Normal),cs_TimingInfo_SFN(v_StartNextModPeriod));
  };

  /*
   * @desc
   * @param     p_CellId
   * @status    APPROVED
   */
  function fl_EUTRA_ModifySysinfo_CrcError ( CellId_Type p_CellId ) runs on EUTRA_PTC
  {
    var SubFrameTiming_Type v_SubFrameTiming;

    f_EUTRA_SetSB1_ValueTag (p_CellId, true);
    
    v_SubFrameTiming.SFN.Number := f_EUTRA_ModifySysinfo_ValueTag(p_CellId);
    v_SubFrameTiming.Subframe.Number := 0;

    f_SS_ConfigCRC_ErrorMode (eutra_Cell1, cs_DL_SCH_CRC_SI_RNTI_Error(Erroneous), cs_TimingInfo(v_SubFrameTiming.SFN.Number, v_SubFrameTiming.Subframe.Number));

    v_SubFrameTiming := f_EUTRA_TimingInfoAdd(v_SubFrameTiming, 100);
    f_SS_ConfigCRC_ErrorMode (eutra_Cell1, cs_DL_SCH_CRC_SI_RNTI_Error(Normal), cs_TimingInfo(v_SubFrameTiming.SFN.Number, v_SubFrameTiming.Subframe.Number));
  }

  /*
   * @desc      REFERENCE TS 36.523-1 clause 7.1.3.6
   * @status    APPROVED
   */
  function f_TC_7_1_3_6_EUTRA ( ) runs on EUTRA_PTC
  { /* L2/MAC
     * 7.1.3.6 : Correct HARQ process handling[BCCH]
     */
    var EUTRA_FDD_TDD_Mode_Type v_EUTRA_FDD_TDD_Mode;
    var EUTRA_CellInfo_Type v_CellInfo;
    var PRACH_ConfigSIB v_PRACH_ConfigSIB;
    var SubFrameTiming_Type v_SubFrameInfo;
    var Dl_Bandwidth_Type v_DlBandwidth;
    var integer v_RBAllocation := 75; // for 5 MHz// @sic R5-103846 sic@

    
    timer t_Watchdog := 5.0;

    ///////////////////////////////////////////////////////////////////////////////////
    //      PREAMBLE
    //////////////////////////////////////////////////////////////////////////////////
    f_EUTRA_Init (c1);
    v_EUTRA_FDD_TDD_Mode := f_EUTRA_CellInfo_GetFDD_TDD (eutra_Cell1);
    v_DlBandwidth := f_EUTRA_CellInfo_GetDL_ChBandwidth(eutra_Cell1);
    f_EUTRA_CellConfig_Def (eutra_Cell1);
    //@sic R5s100116
    f_EUTRA_Preamble ( eutra_Cell1,STATE2A_TESTLOOP_ModeA );
    f_EUTRA_LoopBackActivation_State4_TA_Infinity_LB_NoScaling();
    f_Delay(0.660);
    f_EUTRA_StartULGrantTransmissionOnSR_Reception_No_PUCCH_Sync(eutra_Cell1, cs_TimingInfo_Now, cs_DciInfo_CcchDcchDtchUL_Def);

    //@sic R5-101183
    // creates cell and performs registration
    // to configure SS to report reception of HARQ ACK or NACK
    f_SS_ConfigUL_HARQ_IndMode (eutra_Cell1,tsc_L1Mac_IndicationMode_Enable );
    // config for PReamble reception indication
    f_EUTRA_SS_ConfigRachPreambleIndMode ( eutra_Cell1 ,tsc_L1Mac_IndicationMode_Enable);
    ///////////////////////////////////////////////////////////////////////////////////
    //      Test Body
    //////////////////////////////////////////////////////////////////////////////////
    f_EUTRA_TestBody_Set(true);
    // Test body to be added.
    f_EUTRA_CellInfo_SetRootSeqInd(eutra_Cell1,v_EUTRA_FDD_TDD_Mode);
    // Configure SS for CRC error always on SI-RNTI


    //@siclog "Step 1 - 6" siclog@
    // Tx  NEw Sys info:
    fl_EUTRA_ModifySysinfo_CrcError(eutra_Cell1);
    //@siclog "Step 2 - 7" siclog@
    t_Watchdog.start(5.120);
    alt {
      []SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1, ?,? ))
        {
          t_Watchdog.stop;
          f_EUTRA_SetVerdictFailOrInconc(__FILE__, __LINE__, "Step 2: UE is sending HARQ ACK/ NACK ");
        }
      [] t_Watchdog.timeout
        {
          f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "Step 2");
        }
    };
    f_SS_ConfigUL_HARQ_IndMode (eutra_Cell1,tsc_L1Mac_IndicationMode_Disable );
    // @sic R5-103846 sic@
    //@siclog "Steps 3 - 4 - 5 void" siclog@
    //@siclog "Step 8" siclog@
    //update SS for changed PRACH Info

    v_CellInfo := f_EUTRA_CellInfo_Get (eutra_Cell1);
    v_PRACH_ConfigSIB := v_CellInfo.Sysinfo.BCCH_Info.SIs[0].message_.c1.systemInformation.criticalExtensions.systemInformation_r8.sib_TypeAndInfo[0].sib2.radioResourceConfigCommon.prach_Config;
    f_EUTRA_SS_CommonCellConfig(eutra_Cell1, cas_CellConfig_UpdatePRACH_Info_REQ(eutra_Cell1,
                                                                                 cs_TimingInfo_Now,
                                                                                 v_PRACH_ConfigSIB));
   
    // to configure SS to stop report reception of HARQ ACK or NACK
    // RAR Grant is of 256 bits suitable for PDCP SDU of 16 bits and MCE C-RNTI
    
     select (v_DlBandwidth) {
      case (n50) {  // 10 mhz
        v_RBAllocation := 150;
      }
      case (n100) { // 20 mhz
        v_RBAllocation := 300;
      }
      case else {   // 5 mhz
        v_RBAllocation := 75;
      }
    }
    f_EUTRA_SS_ConfigRachProcedure (eutra_Cell1, omit, cs_RachProcedureConfig_CRNTI(f_EUTRA_CellInfo_GetRAR_TA(eutra_Cell1),
                                                                                    v_DlBandwidth,
                                                                                    v_RBAllocation,4));
    //@siclog "Step 8" siclog@
    // To stop UL Grant Transmision
    f_EUTRA_StopULGrantTransmission_No_PUCCH_Sync ( eutra_Cell1, cs_TimingInfo_Now );
    //@siclog "Step 9" siclog@
    // Calculate timing info such that UE is in DRX on Duration
    v_SubFrameInfo := f_EUTRA_GetNextSendOccasion(eutra_Cell1, 1500);  // 1500 ms in future more than 100 ms and 1280 ms DRX cycle
    v_SubFrameInfo.SFN.Number := (v_SubFrameInfo.SFN.Number / 128) * 128 ;
    // Sub frame 4 is selected to be suitable to both FDD and TDD and is inside on duration
    
    DRB.send (cas_DRB_COMMON_REQ_PDCP_SDU (eutra_Cell1, tsc_RbId_DRB1, cs_TimingInfo(v_SubFrameInfo.SFN.Number, 4), cs_PDCP_SDUList_1 (crs_PDCP_SDU_16B)));
    //@siclog "Step 10" siclog@
    // Not received in TTCN
    //@siclog "Step 11" siclog@
    t_Watchdog.start;
    SYSIND.receive ( car_PRACH_Preamble_IND (eutra_Cell1, ?, ?));
     f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "Step 11: UE sent PRACH Preamble in step 11");
    //@siclog "Step 12" siclog@
    // Taken care of SS preconfig;
    //@siclog "Step 13" siclog@
    DRB.receive (car_DRB_COMMON_IND_PDCP_SDUList (eutra_Cell1,tsc_RbId_DRB1, cr_TimingInfo_Any, cr_PDCP_SDUList_1(crs_PDCP_SDU_16B)));
    t_Watchdog.stop;
    //@siclog "Step 14" siclog@
    // Automatically taken care of
    
    f_EUTRA_TestBody_Set(false);
    //test body ends
    
    ///////////////////////////////////////////////////////////////////////////////////
    //      Post Amble
    //////////////////////////////////////////////////////////////////////////////////
    // config for PReamble reception indication
    f_EUTRA_SS_ConfigRachPreambleIndMode ( eutra_Cell1 ,tsc_L1Mac_IndicationMode_Disable);
    // To deactivate test loop mode before RRC release
    //@sic R5-103847 Deactivate test loop and open test loop is removed sic@
     f_EUTRA_SS_ConfigRachProcedure (eutra_Cell1, omit, cs_RachProcedureConfig_CRNTI( f_EUTRA_CellInfo_GetRAR_TA(eutra_Cell1),v_DlBandwidth,v_RBAllocation,5
                                                      ));//@sic R5s100189 sic@
    // Release RRC Connection and Switch off
    f_EUTRA_Postamble ( eutra_Cell1, E3_TESTMODE );//@sic R5-103875 sic@
  };  // End of 7.1.3.6

  /*
   * @desc      REFERENCE TS 36.523-1 clause 7.1.3.7
   * @status    APPROVED
   */
  function f_TC_7_1_3_7_EUTRA ( ) runs on EUTRA_PTC
  { /* L2/MAC
       7.1.3.7 : MAC-Padding
    */
    var SubFrameTiming_Type v_Timing, v_Timing2;
    var octetstring v_EncodedRlcPdu1;

    ///////////////////////////////////////////////////////////////////////////////////
    //      PREAMBLE
    //////////////////////////////////////////////////////////////////////////////////
    f_EUTRA_Init (c1);
    f_EUTRA_CellConfig_Def (eutra_Cell1);
    f_EUTRA_Preamble ( eutra_Cell1,STATE2A_TESTLOOP_ModeA );
    f_EUTRA_AS_CipheringAlgorithm_Set(eea0); // set null AS ciphering algorithm
    // creates cell and performs registration


    //@sic R5S090337 sic@
    f_EUTRA_LoopBackActivation_State4_Def_DisableBSR_PHR(eutra_Cell1, cs_UE_TestLoopModeA_LB_Setup_1DRB(0,tsc_DRB1));
    // step to configure SS RLC/PDCP and MAC in No header manipulation mode on SS Side for DRB
    f_SS_Config1TM_DRB_NoMACHeader(eutra_Cell1, tsc_RbId_DRB1,cs_MAC_TestMode_NoHeaderManipulationDL_UL);

    ///////////////////////////////////////////////////////////////////////////////////
    //      Test Body
    //////////////////////////////////////////////////////////////////////////////////
    f_EUTRA_TestBody_Set(true,layer2); // @sic R5-101050.
    // preconfig SS for UL Grant of 24 bits
    f_EUTRA_StartExplicitULGrantTransmissionOnSR_Reception( eutra_Cell1,
                                                            cs_TimingInfo_Now,
                                                            1, 1); /* Nprb = 1, Itbs = 1          Table 7.1.7.2.1-1 of 36.213
                                                                      Imcs = 1 -> Itbs = 1   MCS index of table 8.6.1-1 of 36.213 */


    //@siclog "Step 1" siclog@
    // 37B PDCP SDU + 2B PDCP H + 2B RLC Header +2B MAC SH+ 1B Pad SH + 7B Pad = 51 B= 408 bits
    v_EncodedRlcPdu1 := f_RLC_PDU_Encvalue (cs_RLC_AMD_1PDU(tsc_Poll,
                                                            int2bit (0,10),
                                                            f_PDCP_PDU_Encvalue (cs_PDCP_PDU_LongSN(cs_PDCP_DataPdu_LongSN(tsc_B12_SQN0, crs_PDCP_SDU_L37)))));
    DRB.send (cas_DRB_COMMOM_REQ_MAC_PDU (eutra_Cell1,
                                          tsc_RbId_DRB1,
                                          cs_TimingInfo_Now,
                                          cs_MAC_PDUList_1 (cs_MAC_PDU_1SubHeader_Padding_RLCPDU_Short(crs_Padding_7Bytes,
                                                                                                       tsc_LchId_DRB1,
                                                                                                       v_EncodedRlcPdu1))));

    //@siclog "Step 2" siclog@
    //Local function f_RLC_Status_PDU_Rx (SN) to retrieve de RLC Status PDU with a given SN
    f_RLC_Status_PDU_Rx (tsc_LchId_DRB1, 1);

    //@siclog "Step 3" siclog@
    // 41B PDCP SDU + 2B PDCP H + 2B RLC H+ 1B PAD H + 1B MacSH = 47B =376
    v_EncodedRlcPdu1 := f_RLC_PDU_Encvalue (cs_RLC_AMD_1PDU(tsc_Poll,
                                                            int2bit (1,10),
                                                            f_PDCP_PDU_Encvalue (cs_PDCP_PDU_LongSN(cs_PDCP_DataPdu_LongSN(tsc_B12_SQN1, crs_PDCP_SDU_L41)))));
    DRB.send (cas_DRB_COMMOM_REQ_MAC_PDU (eutra_Cell1,
                                          tsc_RbId_DRB1,
                                          cs_TimingInfo_Now,
                                          cs_MAC_PDUList_1 (cs_MAC_PDU_1SubHeader_1Padding( tsc_LchId_DRB1, v_EncodedRlcPdu1))));

    //@siclog "Step 4" siclog@
    f_RLC_Status_PDU_Rx (tsc_LchId_DRB1, 2);

    //@siclog "Step 5" siclog@
    //SS sets DL assignment for TBS of 16 bits, automatically taken care of

    //100 ms to wait for having an accurate reference to start
    v_Timing := f_EUTRA_GetNextSendOccasion(eutra_Cell1);  // per default 100ms in advance
    //@siclog "Step 6" siclog@
    DRB.send (cas_DRB_COMMOM_REQ_MAC_PDU (eutra_Cell1,
                                         tsc_RbId_DRB1,
                                         cs_TimingInfo(v_Timing.SFN.Number, v_Timing.Subframe.Number),
                                         cs_MAC_PDUList_1 (cs_MAC_PDU_TimingAdvance_0)));

    //@siclog "Step 7" siclog@
    //SS sets DL assignment for TBS of 24 bits, automatically taken care of

    //@siclog "Step 8" siclog@
    // 50% of time alignment timer = 0.5  * 750 = 375 ms.
    v_Timing2 := f_EUTRA_TimingInfoAdd(v_Timing, 375); //375 ms in future

    DRB.send (cas_DRB_COMMOM_REQ_MAC_PDU (eutra_Cell1,
                                          tsc_RbId_DRB1,
                                          cs_TimingInfo(v_Timing2.SFN.Number, v_Timing2.Subframe.Number),
                                          cs_MAC_PDUList_1 (cs_MAC_PDU_TimingAdvance_1Padding)));

    //@siclog "Step 9" siclog@
    // 70% of time alignment timer = 0.7 * 750 = 525 ms.
    v_Timing := f_EUTRA_TimingInfoAdd(v_Timing2, 525); //525 ms in future

    //@siclog "Step 9A" siclog@
    //42B PDCP SDU + 2B PDCP H + 2B RLC H+ 1B MacSH = 47B =376
    v_EncodedRlcPdu1 := f_RLC_PDU_Encvalue (cs_RLC_AMD_1PDU(tsc_Poll,
                                                            int2bit (2,10),
                                                            f_PDCP_PDU_Encvalue (cs_PDCP_PDU_LongSN(cs_PDCP_DataPdu_LongSN(tsc_B12_SQN2, crs_PDCP_SDU_L42)))));
    DRB.send (cas_DRB_COMMOM_REQ_MAC_PDU (eutra_Cell1,
                                          tsc_RbId_DRB1,
                                          cs_TimingInfo(v_Timing.SFN.Number, v_Timing.Subframe.Number),
                                          cs_MAC_PDUList_1 (cs_MAC_PDU_NoPadding_RLCPDU_LCID(tsc_LchId_DRB1,v_EncodedRlcPdu1))));

    //@siclog "Step 10" siclog@
    f_RLC_Status_PDU_Rx (tsc_LchId_DRB1, 3);

    f_EUTRA_TestBody_Set(false);
    //test body ends

    ///////////////////////////////////////////////////////////////////////////////////
    //      Post Amble
    //////////////////////////////////////////////////////////////////////////////////
    // step to configure SS RLC/PDCP and MAC in No header manipulation mode on SS Side for DRB
    f_SS_Config1TM_DRB_NoMACHeader(eutra_Cell1, tsc_RbId_DRB1,cs_MAC_TestMode_NormalMode); //@sic R5s100272

    // configure SS in normal grant transmission
    f_EUTRA_StartDefULGrantTransmission(eutra_Cell1,cs_TimingInfo_Now);

    // To deactivate test loop mode before RRC release
    //@sic R5-103847 Deactivate test loop and open test loop is removed sic@

    // Release RRC Connection and Switch off
    f_EUTRA_Postamble ( eutra_Cell1, E3_TESTMODE );//@sic R5-103875 sic@

  };

   function f_TC_7_1_3_9_EUTRA ( ) runs on EUTRA_PTC
   /* L2/MAC
      7.1.3.9 : MAC reset-DL
   */
   {
     const HarqProcessId_Type tsc_HARQ_Process := 3; // selected the highest allowed HARQ process in TDD config 0

     var SubFrameTiming_Type v_Timing, v_Timing2;
     var SRB_COMMON_IND v_SRB_COMMON_IND;
     var SYSTEM_IND v_ReceivedSYSIND;
     var float v_HarqIndWindowSize;

     timer t_Watchdog:=5.0; // General purpose wait timer

     ///////////////////////////////////////////////////////////////////////////////////
     //      PREAMBLE
     //////////////////////////////////////////////////////////////////////////////////

     f_EUTRA_Init (c1);
     // Config Cell 1 for 1 AM DRB
     f_EUTRA_CellConfig_Def (eutra_Cell1);
     f_EUTRA_SetCellPower (eutra_Cell1, -90, cs_TimingInfo_Now);
     f_SS_ConfigDLHARQProcess_Subset(eutra_Cell1,-,cs_HarqProcessList_012); // To allow only first 3 HARQ processes for autonomous SS selection
     //R5s100456, cell config moved above set attenuation @sic
     // bring up cell 2 with T0 setting
     f_EUTRA_CellInfo_InitMaxReferencePower(eutra_Cell2, -80);
     f_EUTRA_CellConfig_Def (eutra_Cell2);
     f_SS_ConfigDLHARQProcess_Subset(eutra_Cell2,-,cs_HarqProcessList_012);// To allow only first 3 HARQ processes for autonomous SS selection

     // Bring UE to idle updated state
     f_EUTRA_Preamble ( eutra_Cell1, STATE2A_TESTLOOP_ModeA );
     // Bring UE to state 3

     //R5-094629
     f_EUTRA_RbEst_Def(eutra_Cell1);

     f_EUTRA_CloseUE_TestLoopModeA(eutra_Cell1, cs_UE_TestLoopModeA_LB_Setup_NoScaling );


     // to enable reception of SR in cell 2
     f_SS_ConfigSchedulingRequestIndMode(eutra_Cell2, tsc_L1Mac_IndicationMode_Enable);
     // to configure SS to report reception of HARQ ACK or NACK
     f_SS_ConfigUL_HARQ_IndMode (eutra_Cell2,tsc_L1Mac_IndicationMode_Enable );
     // preconfig for RACH procedure
     f_EUTRA_SS_ConfigRachProcedure (eutra_Cell2,tsc_C_RNTI_Def2, cs_RachProcedureConfig_Def(omit,
                                                                            f_EUTRA_CellInfo_GetRAR_TA(eutra_Cell1),
                                                                            f_EUTRA_CellInfo_GetDL_ChBandwidth(eutra_Cell1)));// @sic R5-103846 sic@

     ///////////////////////////////////////////////////////////////////////////////////
     //      Test Body
     //////////////////////////////////////////////////////////////////////////////////
     f_EUTRA_TestBody_Set(true,layer2); // @sic R5-101050.
     //@siclog "Step 1" siclog@
     // To stop UL Grant Transmision
     f_EUTRA_StopULGrantTransmission_PUCCH_Sync ( eutra_Cell1,cs_TimingInfo_Now );

     // 38 bytes PDCP SDU +2 byte PDCP header
     // 2 bytes RLC Header +2 byte MAC Header =352 bits, nearest TB  size =376 => padding =24 bits
     // 1 byte padding header and 2 bits padding
     //@siclog "Step 4" siclog@
     // Sequence is changed to facilitate SS implementations.
     f_EUTRA_SetCellPower (eutra_Cell2, -80, cs_TimingInfo_Now);
     v_Timing := f_EUTRA_GetCurrentTiming(eutra_Cell1);
     v_Timing := f_EUTRA_TimingInfoAdd(v_Timing, 100);// schedule 100 ms in future
     // set CRC error as error mode
     f_SS_ConfigCRC_ErrorMode(eutra_Cell1, cs_DL_SCH_CRC_C_RNTI_Error(Erroneous), cs_TimingInfo(v_Timing.SFN.Number, v_Timing.Subframe.Number ));
     v_Timing.Subframe.Number := 0; // suitable for both FDD and TDD
     v_Timing := f_EUTRA_TimingInfoAdd(v_Timing, 30);// schedule 20-30 ms in future
     //@siclog "Step 2" siclog@
     DRB.send (cas_DRB_COMMON_REQ_PDCP_SDU(eutra_Cell1,
                                           tsc_RbId_DRB1,
                                           cs_TimingInfo(v_Timing.SFN.Number, v_Timing.Subframe.Number),
                                           cs_PDCP_SDUList_1 (crs_PDCP_SDU_L38),
                                           cs_HarqProcessAssignment_Specific(tsc_HARQ_Process)));

     // set CRC error as normal mode 60 ms after the scheduled transmission
     // so that 5 transmissions are performed.
     v_Timing.SFN.Number := (v_Timing.SFN.Number + 6) mod 1024;
     f_SS_ConfigCRC_ErrorMode(eutra_Cell1, cs_DL_SCH_CRC_C_RNTI_Error(Normal), cs_TimingInfo( v_Timing.SFN.Number, v_Timing.Subframe.Number ));
     //@siclog "Step 5" siclog@
     v_Timing.Subframe.Number := 5; // next sub frame suitable for both FDD and TDD
     //@sic R5s100240 sic@
     f_EUTRA_508RRC_ConnReconfigHO_IntraLTE (eutra_Cell1,
                                             eutra_Cell2,
                                             cs_TimingInfo( (v_Timing.SFN.Number + 1) mod 1024, v_Timing.Subframe.Number ));
     //@siclog "Step 3" siclog@
     t_Watchdog.start;
     SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1, ?, nack ));
     f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "Step 3");
     t_Watchdog.stop;

     //@siclog "Step 6" siclog@
     // Check: does the UE transmit a RRCConnectionReconfigurationComplete message to confirm the reconfiguration of the radio resources?
     t_Watchdog.start;
     alt {
       [] SRB.receive ( car_SRB1_RrcPdu_IND ( eutra_Cell2, cr_508_RRCConnectionReconfigurationComplete ( tsc_RRC_TI_Def ) ) ) -> value v_SRB_COMMON_IND
          {
              v_Timing := v_SRB_COMMON_IND.Common.TimingInfo.SubFrame; //store TimeStamp when RRCConnectionReconfiguration has been received
              f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "Step 6");
              t_Watchdog.stop;
          }
       []  SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1, ?, nack ))
          {
              repeat;
              // any NACKS received
          }
     };

     //@siclog "Step 7" siclog@
     alt {
       [] SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1, ?, nack )) -> value v_ReceivedSYSIND
         {
             //Check if the received HARQ Ind is within a window of 100 ms
              v_Timing2 := v_ReceivedSYSIND.Common.TimingInfo.SubFrame;
              v_HarqIndWindowSize := f_EUTRA_SetTimerToleranceMin(eutra_Cell1, 0.1); //100 ms to wait safely no SR Rx
              if (f_EUTRA_SubFrameTimingDuration_Float(v_Timing, v_Timing2) < v_HarqIndWindowSize) {
                f_EUTRA_SetVerdictFailOrInconc(__FILE__, __LINE__, "Step 7: UE is sending HARQ ACK in cell 1");
              }
         }
       [] SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell2, ?, nack )) -> value v_ReceivedSYSIND
         {
             //Check if the received HARQ Ind is within a window of 100 ms
              v_Timing2 := v_ReceivedSYSIND.Common.TimingInfo.SubFrame;
              v_HarqIndWindowSize := f_EUTRA_SetTimerToleranceMin(eutra_Cell1, 0.1); //100 ms to wait safely no SR Rx
              if (f_EUTRA_SubFrameTimingDuration_Float(v_Timing, v_Timing2) < v_HarqIndWindowSize) {
                f_EUTRA_SetVerdictFailOrInconc(__FILE__, __LINE__, "Step 7: UE is sending HARQ ACK in cell 2");
              }
         }
     };

     // default grant config
     f_EUTRA_StartDefULGrantTransmission(eutra_Cell2,cs_TimingInfo_Now);
     //@siclog "Step 8" siclog@
     // SS guarantees NDI to be same as step2, as
     //"The initial value of the NDI shall be the same for all HARQ processes and cells".
     DRB.send (cas_DRB_COMMON_REQ_PDCP_SDU(eutra_Cell2,
                                           tsc_RbId_DRB1,
                                           cs_TimingInfo_Now,
                                           cs_PDCP_SDUList_1 (crs_PDCP_SDU_L38_1),
                                           cs_HarqProcessAssignment_Specific(tsc_HARQ_Process)));


     //@siclog "Step 9" siclog@
     t_Watchdog.start;
     SYSIND.receive ( car_SchedulingReq_IND (eutra_Cell2, ?));
     f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "Step 9: UE sent SR in cell 2");
     t_Watchdog.stop;

     //@siclog "Step 10" siclog@
     // Automatically taken care of
     //@siclog "Step 11" siclog@
     t_Watchdog.start;
     DRB.receive (car_DRB_COMMON_IND_PDCP_SDUList (eutra_Cell1,tsc_RbId_DRB1,cr_TimingInfo_Any,cr_PDCP_SDUList_1(crs_PDCP_SDU_L38_1)));
     f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "Step 11");
     t_Watchdog.stop;

      f_EUTRA_TestBody_Set(false);
     //test body ends

     ///////////////////////////////////////////////////////////////////////////////////
     //      Post Amble
     //////////////////////////////////////////////////////////////////////////////////
     // to configure SS to stop report reception of HARQ ACK or NACK
     f_SS_ConfigUL_HARQ_IndMode (eutra_Cell1,tsc_L1Mac_IndicationMode_Disable );
     // to configure SS to stop report reception of HARQ ACK or NACK
     f_SS_ConfigUL_HARQ_IndMode (eutra_Cell2,tsc_L1Mac_IndicationMode_Disable );
     // to disable reception of SR in cell 2
     f_SS_ConfigSchedulingRequestIndMode(eutra_Cell2, tsc_L1Mac_IndicationMode_Disable);

     // To deactivate test loop mode before RRC release
     //@sic R5-103847 Deactivate test loop and open test loop is removed sic@

     // Release RRC Connection and Switch off
     f_EUTRA_Postamble ( eutra_Cell2, E3_TESTMODE );//@sic R5-103875 sic@
     //Remove the cell1, non camping
     //@sic R5-103847 taken care in postamble now sic@


   }; // end of 7.1.3.9




  function f_TC_7_1_3_2_EUTRA ( ) runs on EUTRA_PTC
  { /* L2/MAC
       7.1.3.2 : Correct handling of DL assignment: semi persistent case
    */
    const C_RNTI tsc_SPS_RNTI := tsc_C_RNTI_Def2;
    const integer tsc_SPS_SchedInterval := 160 ; //160 Sf the SPS schedule interval
    const integer tsc_SF_Before := 80; //80 Sub frames before

    var SubFrameTiming_Type v_TimingY, v_TimingP;
    var octetstring v_EncodedRlcPdu1;
    var template (value) SpsConfigDL_Type v_SpsConfigDL;
    var EUTRA_FDD_TDD_Mode_Type  v_EUTRA_FDD_TDD_Mode ;

    timer t_Watchdog := 0.4;// 400 ms should be sufficient to receive HARQ ACK/NACK

    ///////////////////////////////////////////////////////////////////////////////////
    //      PREAMBLE
    //////////////////////////////////////////////////////////////////////////////////
    f_EUTRA_Init (c1);
    v_EUTRA_FDD_TDD_Mode := f_EUTRA_CellInfo_GetFDD_TDD (eutra_Cell1);
    f_EUTRA_CellConfig_DefPlusUM (eutra_Cell1);
    f_EUTRA_Preamble ( eutra_Cell1,STATE2A_TESTLOOP_ModeA );
    // creates cell and performs registration
    f_EUTRA_AS_CipheringAlgorithm_Set(eea0); // set null AS ciphering algorithm
    f_EUTRA_RbEst_508_UM(eutra_Cell1 );// Initialization, call setup, DRB loopback
   f_EUTRA_CloseUE_TestLoopModeA(eutra_Cell1, cs_UE_TestLoopModeA_LB_Setup_1DRB(0,tsc_DRB2) );
    // Go to state 4 to return no data in UL

     f_SS_Config1TM_DRB_NoMACHeader(eutra_Cell1, tsc_RbId_DRB2,cs_MAC_TestMode_NoHeaderManipulationDLOnly);
     // Configure SS DL in MAC Test Mode

     if (v_EUTRA_FDD_TDD_Mode == FDD)
     {
          v_SpsConfigDL :=   cs_SpsConfigDL_FDD
     }
     else
     {
         v_SpsConfigDL :=    cds_SpsConfigDL_TDD
     };
     // Default SPS configuration as in specific message contents.
     f_RRC_ConnectionReconfiguration_SPS_Config(eutra_Cell1,tsc_RRC_TI_Def,cs_TimingInfo_Now,
                                                cs_SPS_Config_DL(tsc_SPS_RNTI,cs_SPS_ConfigDL_Setup(v_SpsConfigDL)));
     // to configure SS to report reception of HARQ ACK or NACK
     f_SS_ConfigUL_HARQ_IndMode (eutra_Cell1,tsc_L1Mac_IndicationMode_Enable );
    ///////////////////////////////////////////////////////////////////////////////////
    //      Test Body
    //////////////////////////////////////////////////////////////////////////////////
    f_EUTRA_TestBody_Set(true,layer2); // @sic R5-101050.
    // configure SS for default grant allocation
    f_EUTRA_StartDefULGrantTransmission(eutra_Cell1,cs_TimingInfo_Now);
    //@siclog "Steps 1 - 2" siclog@
    v_TimingY := f_EUTRA_GetCurrentTiming(eutra_Cell1);
    v_TimingY.SFN.Number := (v_TimingY.SFN.Number + 11) mod 1024; // app 110 ms in future
   //   v_UL_HARQ_SFN:= v_TimingY.SFN.Number; // Frame number of
    v_TimingY.Subframe.Number := 0; // selected as DL frame in all TDD configurations

    f_SS_ActivateSPS_Grant (eutra_Cell1, cs_TimingInfo(v_TimingY.SFN.Number, v_TimingY.Subframe.Number ),
                            cs_DL_SPSInfo (tsc_SPS_RNTI,cs_SpsAssignmentDL (cs_DciDLInfo_Explicit (cs_DciDlInfoExplicit_DCI1_RA0(3,8)), v_SpsConfigDL)));

    //Nprb =8, Imcs =3=Itbs
    // 40B PDCP SDU + 2B PDCP H + 2B RLC H + 1B MacSH = 45B =440
    // As GCF priority 2, then DCI format 1 RA 0 is used for UE specific.
    v_EncodedRlcPdu1 := f_RLC_PDU_Encvalue (cs_RLC_UMD_1PDU(0,
                                                            f_PDCP_PDU_Encvalue (cs_PDCP_PDU_LongSN(cs_PDCP_DataPdu_LongSN(tsc_B12_SQN0, crs_PDCP_SDU_L40)))));
    DRB.send (cads_DRB_COMMOM_REQ_MAC_PDU_NoCRNTI_Grant (eutra_Cell1,
                                          tsc_RbId_DRB2,
                                          cs_TimingInfo(v_TimingY.SFN.Number, v_TimingY.Subframe.Number),
                                          cs_MAC_PDUList_1 (cs_MAC_PDU_NoPadding_RLCPDU_LCID( tsc_LchId_DRB2, v_EncodedRlcPdu1))));

    //@siclog "Step 3" siclog@
    t_Watchdog.start;
    SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1,  cr_TimingInfo(v_TimingY.SFN.Number,?), ack ));
    // with DL sub frame 0, the Ack shall be receieved in same Frame
    f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "Step 3");
    t_Watchdog.stop;

    //@siclog "Step 4" siclog@
    v_TimingY.SFN.Number := (v_TimingY.SFN.Number + ((v_TimingY.Subframe.Number + tsc_SPS_SchedInterval)/10)) mod 1024; // app 110 ms in future
    v_TimingY.Subframe.Number := (v_TimingY.Subframe.Number + tsc_SPS_SchedInterval)mod 10;
    v_EncodedRlcPdu1 := f_RLC_PDU_Encvalue (cs_RLC_UMD_1PDU(1,
                                                            f_PDCP_PDU_Encvalue (cs_PDCP_PDU_LongSN(cs_PDCP_DataPdu_LongSN(tsc_B12_SQN1, crs_PDCP_SDU_L40)))));
    DRB.send (cads_DRB_COMMOM_REQ_MAC_PDU_NoCRNTI_Grant (eutra_Cell1,
                                          tsc_RbId_DRB2,
                                          cs_TimingInfo(v_TimingY.SFN.Number, v_TimingY.Subframe.Number),
                                          cs_MAC_PDUList_1 (cs_MAC_PDU_NoPadding_RLCPDU_LCID( tsc_LchId_DRB2, v_EncodedRlcPdu1))));

    //@siclog "Step 5" siclog@
    t_Watchdog.start;
    SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1, cr_TimingInfo(v_TimingY.SFN.Number,?), ack ));
    f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "Step 5");
    t_Watchdog.stop;


    //@siclog "Steps 6 - 7" siclog@
    v_TimingP.SFN.Number := (v_TimingY.SFN.Number + ((v_TimingY.Subframe.Number + tsc_SPS_SchedInterval- tsc_SF_Before)/10)) mod 1024; // app 110 ms in future
    v_TimingP.Subframe.Number := 0;
    f_SS_ActivateSPS_Grant (eutra_Cell1,cs_TimingInfo(v_TimingP.SFN.Number, v_TimingP.Subframe.Number),
                            cs_DL_SPSInfo (tsc_SPS_RNTI,cs_SpsAssignmentDL (cs_DciDLInfo_Explicit (cs_DciDlInfoExplicit_DCI1_RA0(3,8)), v_SpsConfigDL)));


    v_EncodedRlcPdu1 := f_RLC_PDU_Encvalue (cs_RLC_UMD_1PDU(2,
                                                            f_PDCP_PDU_Encvalue (cs_PDCP_PDU_LongSN(cs_PDCP_DataPdu_LongSN(tsc_B12_SQN2, crs_PDCP_SDU_L40)))));
    DRB.send (cads_DRB_COMMOM_REQ_MAC_PDU_NoCRNTI_Grant (eutra_Cell1,
                                          tsc_RbId_DRB2,
                                          cs_TimingInfo(v_TimingP.SFN.Number, v_TimingP.Subframe.Number),
                                          cs_MAC_PDUList_1 (cs_MAC_PDU_NoPadding_RLCPDU_LCID( tsc_LchId_DRB2, v_EncodedRlcPdu1))));

    //@siclog "Step 8" siclog@
    t_Watchdog.start ;
    SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1, cr_TimingInfo(v_TimingP.SFN.Number,?), ack ));
    f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "Step 8");
    t_Watchdog.stop;

    //@siclog "Step 9" siclog@
    // TBD how to guarantee SS does not send C-RNTI grant
    v_TimingY.SFN.Number := (v_TimingY.SFN.Number + ((v_TimingY.Subframe.Number + tsc_SPS_SchedInterval)/10)) mod 1024; // app 110 ms in future
    v_TimingY.Subframe.Number := (v_TimingY.Subframe.Number + tsc_SPS_SchedInterval)mod 10;

    v_EncodedRlcPdu1 := f_RLC_PDU_Encvalue (cs_RLC_UMD_1PDU(3,
                                                            f_PDCP_PDU_Encvalue (cs_PDCP_PDU_LongSN(cs_PDCP_DataPdu_LongSN(tsc_B12_SQN3, crs_PDCP_SDU_L40)))));
    DRB.send (cads_DRB_COMMOM_REQ_MAC_PDU_NoCRNTI_Grant (eutra_Cell1,
                                          tsc_RbId_DRB2,
                                          cs_TimingInfo(v_TimingY.SFN.Number, v_TimingY.Subframe.Number),
                                          cs_MAC_PDUList_1 (cs_MAC_PDU_NoPadding_RLCPDU_LCID( tsc_LchId_DRB2, v_EncodedRlcPdu1))));

    //@siclog "Step 10" siclog@
    // Taken care in default handler
    /*t_Watchdog.start;
    alt {
      []SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1, ?, ? ))
        {
          f_EUTRA_SetVerdictFailOrInconc(__FILE__, __LINE__, "Step 10: UE is sending HARQ ACK/NACK ");
          t_Watchdog.stop;
        }
      [] t_Watchdog.timeout
        {
          f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "Step 10: UE is not sending HARQ ACK ");
        }
    };*/

    //@siclog "Step 11" siclog@
    f_SS_ConfigCRC_ErrorMode(eutra_Cell1,cs_DL_SCH_CRC_SPS_C_RNTI_Error(Error1AndNormal));
    v_TimingP.SFN.Number := (v_TimingP.SFN.Number + ((v_TimingP.Subframe.Number + tsc_SPS_SchedInterval)/10)) mod 1024; // app 110 ms in future
    v_TimingP.Subframe.Number := (v_TimingP.Subframe.Number + tsc_SPS_SchedInterval)mod 10;


    v_EncodedRlcPdu1 := f_RLC_PDU_Encvalue (cs_RLC_UMD_1PDU(3,
                                                            f_PDCP_PDU_Encvalue (cs_PDCP_PDU_LongSN(cs_PDCP_DataPdu_LongSN(tsc_B12_SQN3, crs_PDCP_SDU_L40)))));
    DRB.send (cads_DRB_COMMOM_REQ_MAC_PDU_NoCRNTI_Grant (eutra_Cell1,
                                          tsc_RbId_DRB2,
                                          cs_TimingInfo(v_TimingP.SFN.Number, v_TimingP.Subframe.Number),
                                          cs_MAC_PDUList_1 (cs_MAC_PDU_NoPadding_RLCPDU_LCID( tsc_LchId_DRB2, v_EncodedRlcPdu1))));

    //@siclog "Step 12" siclog@
    t_Watchdog.start;
    SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1, cr_TimingInfo(v_TimingP.SFN.Number,?), nack ));
    f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "Step 12: UE Sent HARQ NACK ");
    t_Watchdog.timeout;

    //@siclog "Steps 13 - 14" siclog@
    // Automatically taken care by SS
    //@siclog "Step 15" siclog@
    // Note the SFN of ACK is expected as the (v_TimingP.SFN.Number + 1 ) mod 1024, assuming SS
    //will retransmit in the very next available DL sub frame
    t_Watchdog.start;
    SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1, cr_TimingInfo(((v_TimingP.SFN.Number+1)mod 1024,(v_TimingP.SFN.Number+2)mod 1024),?), ack ));
    f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "Step 15: UE sent HARQ ACK ");
    t_Watchdog.stop;

    //@siclog "Step 16" siclog@
    v_TimingP.SFN.Number := (v_TimingP.SFN.Number + ((v_TimingP.Subframe.Number + tsc_SPS_SchedInterval)/10)) mod 1024; // app 110 ms in future
    v_TimingP.Subframe.Number := (v_TimingP.Subframe.Number + tsc_SPS_SchedInterval)mod 10;

    v_EncodedRlcPdu1 := f_RLC_PDU_Encvalue (cs_RLC_UMD_1PDU(4,
                                                            f_PDCP_PDU_Encvalue (cs_PDCP_PDU_LongSN(cs_PDCP_DataPdu_LongSN(tsc_B12_SQN4, crs_PDCP_SDU_L40)))));
    DRB.send (cads_DRB_COMMOM_REQ_MAC_PDU_NoCRNTI_Grant (eutra_Cell1,
                                          tsc_RbId_DRB2,
                                          cs_TimingInfo(v_TimingP.SFN.Number, v_TimingP.Subframe.Number),
                                          cs_MAC_PDUList_1 (cs_MAC_PDU_NoPadding_RLCPDU_LCID( tsc_LchId_DRB2, v_EncodedRlcPdu1))));

    //@siclog "Step 17" siclog@
    t_Watchdog.start;
    SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1, cr_TimingInfo(v_TimingP.SFN.Number,?), ack ));
    f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "Step 17: UE sent HARQ ACK ");
    t_Watchdog.stop;

    //@siclog "Step 18" siclog@
    // Automatically taken care
    //@siclog "Step 19" siclog@
    v_TimingP.SFN.Number:= (v_TimingP.SFN.Number + ((v_TimingP.Subframe.Number + tsc_SPS_SchedInterval)/10)) mod 1024; // app 110 ms in future
    v_TimingP.Subframe.Number := (v_TimingP.Subframe.Number + tsc_SPS_SchedInterval) mod 10;

    v_EncodedRlcPdu1 := f_RLC_PDU_Encvalue (cs_RLC_UMD_1PDU(5,
                                                            f_PDCP_PDU_Encvalue (cs_PDCP_PDU_LongSN(cs_PDCP_DataPdu_LongSN(tsc_B12_SQN5, crs_PDCP_SDU_L40)))));
    DRB.send (cas_DRB_COMMOM_REQ_MAC_PDU (eutra_Cell1,
                                          tsc_RbId_DRB2,
                                          cs_TimingInfo(v_TimingP.SFN.Number, v_TimingP.Subframe.Number),
                                          cs_MAC_PDUList_1 (cs_MAC_PDU_NoPadding_RLCPDU_LCID( tsc_LchId_DRB2, v_EncodedRlcPdu1))));

    //@siclog "Step 20" siclog@
    t_Watchdog.start;
    SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1, cr_TimingInfo(v_TimingP.SFN.Number,?), ack ));
    f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "Step 20: UE sent HARQ ACK ");
    t_Watchdog.stop;

    //@siclog "Step 21" siclog@
    // SS PDCCH for dl_sps explicit release

    v_TimingY.SFN.Number := (v_TimingP.SFN.Number + ((v_TimingP.Subframe.Number + tsc_SPS_SchedInterval- tsc_SF_Before)/10)) mod 1024; // app 110 ms in future
    v_TimingY.Subframe.Number := 0;
    f_SS_SPS_PDCCH_ExplicitRelease(eutra_Cell1,cs_TimingInfo(v_TimingY.SFN.Number,v_TimingY.Subframe.Number ),tsc_SPS_RNTI, dci_1A);
    //@siclog "Step 22" siclog@
    t_Watchdog.start;
    SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1, cr_TimingInfo(v_TimingY.SFN.Number,?), ack ));
    f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "Step 22: UE sent HARQ ACK ");
    t_Watchdog.stop;
    //@siclog "Step 23" siclog@
    v_TimingP.SFN.Number := (v_TimingP.SFN.Number + ((v_TimingP.Subframe.Number + tsc_SPS_SchedInterval)/10)) mod 1024; // app 110 ms in future
    v_TimingP.Subframe.Number := (v_TimingP.Subframe.Number + tsc_SPS_SchedInterval)mod 10;

    v_EncodedRlcPdu1 := f_RLC_PDU_Encvalue (cs_RLC_UMD_1PDU(6,
                                                            f_PDCP_PDU_Encvalue (cs_PDCP_PDU_LongSN(cs_PDCP_DataPdu_LongSN(tsc_B12_SQN5, crs_PDCP_SDU_L40)))));
    DRB.send (cads_DRB_COMMOM_REQ_MAC_PDU_NoCRNTI_Grant (eutra_Cell1,
                                          tsc_RbId_DRB2,
                                          cs_TimingInfo(v_TimingP.SFN.Number,v_TimingP.Subframe.Number ),
                                          cs_MAC_PDUList_1 (cs_MAC_PDU_NoPadding_RLCPDU_LCID( tsc_LchId_DRB2, v_EncodedRlcPdu1))));

    //@siclog "Step 24" siclog@
    // taken care in default handler
    /*t_Watchdog.start;
    SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1, ?, ? ));
    f_EUTRA_SetVerdictFailOrInconc(__FILE__, __LINE__, "Step 24: UE is sending HARQ ACK or NACK ");
    t_Watchdog.stop;*/

    //@siclog "Steps 25 - 26" siclog@
    v_TimingP.SFN.Number := (v_TimingP.SFN.Number + ((v_TimingP.Subframe.Number + tsc_SPS_SchedInterval)/10)) mod 1024; // app 110 ms in future
    v_TimingP.Subframe.Number := (v_TimingP.Subframe.Number + tsc_SPS_SchedInterval)mod 10;

    f_SS_ActivateSPS_Grant (eutra_Cell1,cs_TimingInfo(v_TimingP.SFN.Number,v_TimingP.Subframe.Number ),
                            cs_DL_SPSInfo (tsc_SPS_RNTI,cs_SpsAssignmentDL (cs_DciDLInfo_Explicit (cs_DciDlInfoExplicit_DCI1_RA0(3,8)), v_SpsConfigDL)));

    v_EncodedRlcPdu1 := f_RLC_PDU_Encvalue (cs_RLC_UMD_1PDU(6,
                                                            f_PDCP_PDU_Encvalue (cs_PDCP_PDU_LongSN(cs_PDCP_DataPdu_LongSN(tsc_B12_SQN5, crs_PDCP_SDU_L40)))));
    DRB.send (cads_DRB_COMMOM_REQ_MAC_PDU_NoCRNTI_Grant (eutra_Cell1,
                                          tsc_RbId_DRB2,
                                          cs_TimingInfo(v_TimingP.SFN.Number,v_TimingP.Subframe.Number ),
                                          cs_MAC_PDUList_1 (cs_MAC_PDU_NoPadding_RLCPDU_LCID( tsc_LchId_DRB2, v_EncodedRlcPdu1))));


    //@siclog "Step 27" siclog@
    t_Watchdog.start;
    SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1, cr_TimingInfo(v_TimingP.SFN.Number,?), ack ));
    f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "Step 27: UE sent HARQ ACK ");
    t_Watchdog.stop;
    //---------------------------


    //@siclog "Steps 28 - 29 void" siclog@
    //@siclog "Step 30" siclog@
    v_TimingY.SFN.Number := (v_TimingP.SFN.Number + ((v_TimingP.Subframe.Number + tsc_SPS_SchedInterval- tsc_SF_Before)/10)) mod 1024; // app 110 ms in future
    v_TimingY.Subframe.Number := 0;
    f_SendRRC_ConnectionReconfiguration_SPS_Config(eutra_Cell1,tsc_RRC_TI_Def,cs_TimingInfo(v_TimingY.SFN.Number,v_TimingY.Subframe.Number ),
                                                cs_SPS_Config_DL(omit,cs_SPS_ConfigDL_Release));
    //@siclog "Step 32" siclog@
    v_TimingP.SFN.Number := (v_TimingP.SFN.Number + ((v_TimingP.Subframe.Number + tsc_SPS_SchedInterval)/10)) mod 1024; // app 110 ms in future
    v_TimingP.Subframe.Number := (v_TimingP.Subframe.Number + tsc_SPS_SchedInterval)mod 10;


    /*f_SS_ActivateSPS_Grant (eutra_Cell1,cs_TimingInfo(v_TimingP.SFN.Number, v_TimingP.Subframe.Number ),
                            cs_DL_SPSInfo (tsc_SPS_RNTI,cs_SpsAssignmentDL (cs_DciDLInfo_Explicit (cs_DciDlInfoExplicit_DCI1_RA0(3,8)), v_SpsConfigDL)));*/
    v_EncodedRlcPdu1 := f_RLC_PDU_Encvalue (cs_RLC_UMD_1PDU(7,
                                                            f_PDCP_PDU_Encvalue (cs_PDCP_PDU_LongSN(cs_PDCP_DataPdu_LongSN(tsc_B12_SQN6, crs_PDCP_SDU_L40)))));
    DRB.send (cads_DRB_COMMOM_REQ_MAC_PDU_NoCRNTI_Grant (eutra_Cell1,
                                          tsc_RbId_DRB2,
                                          cs_TimingInfo(v_TimingP.SFN.Number, v_TimingP.Subframe.Number),
                                          cs_MAC_PDUList_1 (cs_MAC_PDU_NoPadding_RLCPDU_LCID( tsc_LchId_DRB2, v_EncodedRlcPdu1))));

    // Deactivate SPS Grant
    f_SS_DeactivateSPS_Grant(eutra_Cell1, cs_TimingInfo( (v_TimingP.SFN.Number + 1) mod 1024, v_TimingP.Subframe.Number));
    //@siclog "Steps 31 - 33" siclog@
    t_Watchdog.start;
    alt {
         [] SRB.receive ( car_SRB1_RrcPdu_IND ( eutra_Cell1, cr_508_RRCConnectionReconfigurationComplete ( tsc_RRC_TI_Def ) ) )
         {
            t_Watchdog.stop;
         }
         [] SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1, cr_TimingInfo(v_TimingY.SFN.Number,?), ack ))
         {
         // ack for RRC Connection Reconfiguration PDU.
            repeat;
            }
        []SYSIND.receive ( car_UL_HARQ_IND (eutra_Cell1, ?, ? ))
         {
           f_EUTRA_SetVerdictFailOrInconc(__FILE__, __LINE__, "Step 33: UE is sending HARQ ACK or NACK ");
           t_Watchdog.stop;
           }
        };
     t_Watchdog.start;
     alt {
       [] t_Watchdog.timeout
         {
           f_EUTRA_PreliminaryPass(__FILE__, __LINE__, "Step 33: UE is not sending HARQ ACK or NACK ");
         }
     }
     //test body ends
    f_EUTRA_TestBody_Set(false);
    ///////////////////////////////////////////////////////////////////////////////////
    //      Post Amble
    //////////////////////////////////////////////////////////////////////////////////

    // to configure SS to stop report reception of HARQ ACK or NACK
    f_SS_ConfigUL_HARQ_IndMode (eutra_Cell1,tsc_L1Mac_IndicationMode_Disable );
        f_SS_Config1TM_DRB_NoMACHeader(eutra_Cell1, tsc_RbId_DRB1,cs_MAC_TestMode_NormalMode);

    // To deactivate test loop mode before RRC release
    //@sic R5-103847 Deactivate test loop and open test loop is removed sic@

    // Release RRC Connection and Switch off
    f_EUTRA_Postamble ( eutra_Cell1, E3_TESTMODE );//@sic R5-103875 sic@
  }; // end of 7.1.3.2



}
