/******************************************************************************/
// @copyright   Copyright Notification
//   No part may be reproduced except as authorized by written permission.
//   The copyright and the foregoing restriction extend to reproduction in all media.
//   Trademark 2010, 3GPP Organizational Partners (ARIB, ATIS, CCSA, ETSI, TTA, TTC).
//   All rights reserved.
// @version: IWD_10wk37
// $Date: 2010-09-16 23:11:35 +0200 (Thu, 16 Sep 2010) $
// $Rev: 3943 $
/******************************************************************************/

module RRC_Measurement_UTRAN
{
  import from UTRAN_RRC_ASN1_Definitions language "ASN.1:1997" all;
  import from UTRAN_ASP_Definitions language "ASN.1:1997" all;
  import from CommonIratDefs all;
  import from UTRAN_ConfigurationSteps all;
  import from UTRAN_CommonFunctions all;
  import from UTRAN_Component all;
  import from UTRAN_Templates all;

//****************************************************************
//Testcases
//****************************************************************

//================================================================
//testcase 8.3.2.3:
//Measurement configuration control and reporting / inter RAT measurements: event B2 (measurement of UTRAN cells)
  function f_TC_8_3_2_3_UTRAN () runs on UTRAN_PTC
  {
    var boolean v_TriggerRxd := false;
    // Prose specifies decimal values, this must be changed TBD!!!
    var integer v_T0_CPICH_Cell7 := -84;
    var integer v_T1_CPICH_Cell7 := -72;
    var integer v_T2_CPICH_Cell7 := -84;

    // Initialise test case
    f_UTRAN_Init(EUTRA_UTRAN);

    f_SS_CreateCellFACH(utran_Cell7);
    f_UTRAN_SendDefSysInfo( utran_Cell7 );
    
    f_UTRAN_SetCellPower( utran_Cell7, v_T0_CPICH_Cell7, v_T0_CPICH_Cell7 );

    f_UTRAN_TestBody_Set( true );

    //------------------------------------------------
    //Start TestBody

    f_UTRAN_Send_IR_SysInfoToEUTRA (utran_Cell7);

    //@siclog "Step 4" siclog@
    // First Trigger: Change cell power according to T1
    v_TriggerRxd := f_WaitForIRATCoOrd_Trigger (EUTRA);
    f_UTRAN_SetCellPower( utran_Cell7, v_T0_CPICH_Cell7, v_T1_CPICH_Cell7 );

    //@siclog "Step 6" siclog@
    // Second Trigger: Change cell power according to T2
    v_TriggerRxd := f_WaitForIRATCoOrd_Trigger (EUTRA);
    f_UTRAN_SetCellPower( utran_Cell7, v_T0_CPICH_Cell7, v_T2_CPICH_Cell7 );

    //Wait for the end of the test
    v_TriggerRxd := f_WaitForIRATCoOrd_Trigger (EUTRA);

    //End TestBody
    //------------------------------------------------
    f_UTRAN_TestBody_Set ( false );

    f_UTRAN_ReleaseCell ( utran_Cell7 );

  }; //end of testcase 8.3.2.3

//================================================================
//testcase 8.3.2.4:
//Measurement configuration control and reporting / Inter-RAT measurements / Periodic reporting / Measurement of UTRAN cells
  function f_TC_8_3_2_4_UTRAN () runs on UTRAN_PTC
  {
    var boolean v_TriggerRxd := false;
    // Prose specifies decimal values, this must be changed TBD!!!
    var integer v_T0_CPICH_Cell5 := -85;
    var integer v_T0_CPICH_Cell7 := tsc_AttenuationCellOFF;

    var integer v_T1_CPICH_Cell5 := -85;
    var integer v_T1_CPICH_Cell7 := -85;

    var integer v_T2_CPICH_Cell5 := tsc_AttenuationCellOFF;
    var integer v_T2_CPICH_Cell7 := -85;

    // Initialise test case
    f_UTRAN_Init(EUTRA_UTRAN);

    f_SS_CreateCellFACH( utran_Cell5 );
    f_UTRAN_SendDefSysInfo( utran_Cell5 );
    f_SS_CreateCellFACH( utran_Cell7 );
    f_UTRAN_SendDefSysInfo( utran_Cell7 );

    f_UTRAN_SetCellPower( utran_Cell5, v_T0_CPICH_Cell5, v_T0_CPICH_Cell5 );
    f_UTRAN_SetCellPower( utran_Cell7, v_T0_CPICH_Cell7, v_T0_CPICH_Cell7 );

    f_UTRAN_TestBody_Set( true );

    //------------------------------------------------
    //Start TestBody

    f_UTRAN_Send_IR_SysInfoToEUTRA (utran_Cell5);
    f_UTRAN_Send_IR_SysInfoToEUTRA (utran_Cell7);

    //@siclog "Step 4" siclog@
    // First Trigger: Change cell power according to T1
    v_TriggerRxd := f_WaitForIRATCoOrd_Trigger (EUTRA);
    f_UTRAN_SetCellPower( utran_Cell5, v_T1_CPICH_Cell5, v_T1_CPICH_Cell5 );
    f_UTRAN_SetCellPower( utran_Cell7, v_T1_CPICH_Cell7, v_T1_CPICH_Cell7 );

    //@siclog "Step 7" siclog@
    // Second Trigger: Change cell power according to T2
    v_TriggerRxd := f_WaitForIRATCoOrd_Trigger (EUTRA);
    f_UTRAN_SetCellPower( utran_Cell5, v_T2_CPICH_Cell5, v_T2_CPICH_Cell5 );
    f_UTRAN_SetCellPower( utran_Cell7, v_T2_CPICH_Cell7, v_T2_CPICH_Cell7 );

    //Wait for the end of the test
    v_TriggerRxd := f_WaitForIRATCoOrd_Trigger (EUTRA);

    //End TestBody
    //------------------------------------------------
    f_UTRAN_TestBody_Set ( false );

    f_UTRAN_ReleaseCell ( utran_Cell5 );
    f_UTRAN_ReleaseCell ( utran_Cell7 );

  }; //end of testcase 8.3.2.4

//================================================================
//testcase 8.3.2.6:
//Measurement configuration control and reporting / inter RAT measurements: Simultaneous A2 and two B2 (measurements of E-UTRAN, UTRAN and GERAN cells)
  function f_TC_8_3_2_6_UTRAN () runs on UTRAN_PTC
  {
    var boolean v_TriggerRxd := false;

    var integer v_T0_CPICH_Cell5 := -80;
    var integer v_T1_CPICH_Cell5 := -60;

    // Initialise test case
    f_UTRAN_Init(EUTRA_UTRAN);

    f_SS_CreateCellFACH(utran_Cell5);
    f_UTRAN_SendDefSysInfo( utran_Cell5 );

    f_UTRAN_SetCellPower( utran_Cell5, v_T0_CPICH_Cell5, v_T0_CPICH_Cell5 );

    f_UTRAN_TestBody_Set( true );

    //------------------------------------------------
    //Start TestBody

    f_UTRAN_Send_IR_SysInfoToEUTRA (utran_Cell5);

    //@siclog "Step 4" siclog@
    // First Trigger: Change cell power according to T1
    v_TriggerRxd := f_WaitForIRATCoOrd_Trigger (EUTRA);
    f_UTRAN_SetCellPower( utran_Cell5, v_T0_CPICH_Cell5, v_T1_CPICH_Cell5 );

    //Wait for the end of the test
    v_TriggerRxd := f_WaitForIRATCoOrd_Trigger (EUTRA);

    //End TestBody
    //------------------------------------------------

    f_UTRAN_TestBody_Set ( false );
    f_UTRAN_ReleaseCell ( utran_Cell5 );

  }; //end of testcase 8.3.2.6

//================================================================
//testcase 8.3.3.2:
//Measurement configuration control and reporting / SON / ANR: CGI reporting of UTRAN cell
  function f_TC_8_3_3_2_UTRAN () runs on UTRAN_PTC
  {
    var boolean v_TriggerRxd := false;

    var integer v_T0_CPICH_Cell5 := tsc_AttenuationCellOFF;
    var integer v_T0_PCCPCH_Cell5 := tsc_AttenuationCellOFF;

    var integer v_T1_CPICH_Cell5 := -75;
    var integer v_T1_PCCPCH_Cell5 := -78;

    // Initialise test case
    f_UTRAN_Init( EUTRA_UTRAN );
    //TBD!!!! Here need to change the contents of MIB, SIB1, SIB3 //@sic R5-105002 sic@

    f_SS_CreateCellFACH( utran_Cell5 );
    f_UTRAN_SendDefSysInfo( utran_Cell5 );

    f_UTRAN_SetCellPower( utran_Cell5, v_T0_CPICH_Cell5, v_T0_PCCPCH_Cell5 );

    f_UTRAN_TestBody_Set( true );

    //------------------------------------------------
    //Start TestBody

    f_UTRAN_Send_IR_SysInfoToEUTRA( utran_Cell5 );

    //@siclog "Step 3" siclog@
    //First Trigger: The SS changes Cell 5 power level according to the row "T1" in table 8.3.3.2.3.2-1.
    v_TriggerRxd := f_WaitForIRATCoOrd_Trigger( EUTRA );
    f_UTRAN_SetCellPower( utran_Cell5, v_T1_CPICH_Cell5, v_T1_PCCPCH_Cell5 );

    //Wait for the end of the test
    v_TriggerRxd := f_WaitForIRATCoOrd_Trigger (EUTRA);

    //End TestBody
    //------------------------------------------------

    f_UTRAN_TestBody_Set( false );
    f_UTRAN_ReleaseCell( utran_Cell5 );

  }; //end of testcase 8.3.3.2

} // end of Module
